Searched refs:SMRD (Results 1 – 11 of 11) sorted by relevance
| /external/llvm/test/CodeGen/R600/ |
| D | smrd.ll | 4 ; SMRD load with an immediate offset.
16 ; SMRD load with the largest possible immediate offset.
28 ; SMRD load with an offset greater than the largest possible immediate.
42 ; SMRD load with a 64-bit offset
63 ; SMRD load using the load.const intrinsic with an immediate offset
76 ; SMRD load using the load.const intrinsic with the largest possible immediate
89 ; SMRD load using the load.const intrinsic with an offset greater than the
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| D | salu-to-valu.ll | 50 ; Test moving an SMRD instruction to the VALU
78 ; Test moving ann SMRD with an immediate offset to the VALU
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| D | si-sgpr-spill.ll | 9 ; Writing to M0 from an SMRD instruction will hang the GPU.
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| /external/llvm/docs/ |
| D | R600Usage.rst | 31 SMRD Instructions
33 Only the s_load_dword* SMRD instructions are supported.
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIInstrInfo.td | 258 class SMRD <bits<5> op, dag outs, dag ins, string asm, list<dag> pattern> :
273 let EncodingType = 5; //SIInstrEncodingType::SMRD
489 def _IMM : SMRD <
497 def _SGPR : SMRD <
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| /external/llvm/lib/Target/R600/ |
| D | SIDefines.h | 35 SMRD = 1 << 16, enumerator
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| D | SIInstrFormats.td | 37 field bits<1> SMRD = 0;
64 let TSFlags{16} = SMRD;
287 class SMRD <dag outs, dag ins, string asm, list<dag> pattern> :
291 let SMRD = 1;
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| D | SIInstrInfo.h | 195 return get(Opcode).TSFlags & SIInstrFlags::SMRD; in isSMRD()
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| D | SIInstructions.td | 56 // SMRD Instructions
62 // SMRD instructions, because the SGPR_32 register class does not include M0
63 // and writing to M0 from an SMRD instruction will hang the GPU.
2114 // SMRD Patterns
2117 multiclass SMRD_Pattern <SMRD Instr_IMM, SMRD Instr_SGPR, ValueType vt> {
2138 multiclass SMRD_Pattern_vi <SMRD Instr_IMM, SMRD Instr_SGPR, ValueType vt> {
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| D | SIInstrInfo.td | 725 // SMRD classes
729 SMRD <outs, ins, "", pattern>,
737 SMRD <outs, ins, asm, []>,
745 SMRD <outs, ins, asm, []>,
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| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| D | SIMCCodeEmitter.cpp | 42 SMRD = 5, enumerator
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