| /external/tremolo/Tremolo/ |
| D | mdctARM.s | 203 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
204 SMULL r14,r6, r7, r6 @ (r14,r6) = *--r * *--wR
242 SMULL r14,r11,r12,r11 @ (r14,r11) = *l * *wL++
243 SMULL r14,r6, r7, r6 @ (r14,r6) = *--r * *--wR
326 SMULL r8, r9, r7, r11 @ (r8, r9) = s2*T[1]
332 SMULL r8, r12,r7, r10 @ (r8, r12) = s2*T[0]
350 SMULL r8, r9, r6, r10 @ (r8, r9) = s0*T[1]
356 SMULL r8, r12,r7, r10 @ (r8, r12) = s2*T[1]
386 SMULL r14,r12,r8, r11 @ (r14,r12) = ro0*T[1]
392 SMULL r14,r3, r9, r11 @ (r14,r3) = ro2*T[1]
[all …]
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| D | floor1ARM.s | 57 SMULL r6, r5, r4, r5 @ (r6,r5) = *d * *floor
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| /external/llvm/test/CodeGen/AArch64/ |
| D | aarch64-smull.ll | 225 ; SMULL recognizing BUILD_VECTORs with sign/zero-extended elements.
235 ; Do not use SMULL if the BUILD_VECTOR element values are too big.
269 ; Do not use SMULL if the BUILD_VECTOR element values are too big.
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 185 SMULL, enumerator
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| D | AArch64ISelLowering.cpp | 899 case AArch64ISD::SMULL: return "AArch64ISD::SMULL"; in getTargetNodeName()
1862 NewOpc = AArch64ISD::SMULL; in LowerMUL()
1872 NewOpc = AArch64ISD::SMULL; in LowerMUL()
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| D | AArch64InstrInfo.td | 260 def AArch64smull : SDNode<"AArch64ISD::SMULL", SDT_AArch64mull>;
3261 defm SMULL : SIMDLongThreeVectorBHS<0, 0b1100, "smull", int_aarch64_neon_smull>;
3290 // Additional patterns for SMULL and UMULL
4353 defm SMULL : SIMDVectorIndexedLongSD<0, 0b1010, "smull",
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_32.c | 99 #define SMULL 0xe0c00090 macro
1097 mul_inst = SMULL | (reg_map[TMP_REG3] << 16) | (reg_map[dst] << 12); in emit_single_op()
1836 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL) in sljit_emit_op0()
1843 return push_inst(compiler, (op == SLJIT_UMUL ? UMULL : SMULL) in sljit_emit_op0()
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| D | sljitNativeARM_T2_32.c | 150 #define SMULL 0xfb800000 macro
751 FAIL_IF(push_inst32(compiler, SMULL | RT4(dst) | RD4(TMP_REG2) | RN4(arg1) | RM4(arg2))); in emit_op_imm()
1268 return push_inst32(compiler, (op == SLJIT_UMUL ? UMULL : SMULL) in sljit_emit_op0()
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| /external/vixl/doc/ |
| D | supported-instructions.md | 1071 ### SMULL ### subsection
3237 ### SMULL ### subsection
3247 ### SMULL ### subsection
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3850 def SMULL : AsMul1I64<0b0000110, (outs GPR:$RdLo, GPR:$RdHi),
3864 (SMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
5657 // MUL/UMLAL/SMLAL/UMULL/SMULL are available on all arches, but
5674 (SMULL GPR:$RdLo, GPR:$RdHi, GPR:$Rn, GPR:$Rm, pred:$p, cc_out:$s)>,
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| D | ARMScheduleSwift.td | 1314 (instregex "SMULL$", "UMULL$", "t2SMULL$", "t2UMULL$")>;
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| D | ARMScheduleA9.td | 2501 (instregex "SMULL", "SMULLv5", "UMULL", "UMULLv5", "SMLAL$", "UMLAL",
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| D | ARMISelDAGToDAG.cpp | 2653 ARM::SMULL : ARM::SMULLv5, in Select()
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| /external/valgrind/none/tests/arm/ |
| D | v6intARM.stdout.exp | 542 SMULL
736 ------------ SMULL{B,T}{B,T} ------------
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| D | v6intThumb.stdout.exp | 17349 SMULL
17502 ------------ SMULL{B,T}{B,T} ------------
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| D | v6media.stdout.exp | 29 SMULL
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1775 # SMULL
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| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 2415 @ SMULL
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| D | basic-arm-instructions.s | 2556 @ SMULL
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