| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 191 SMUL_LOHI, UMUL_LOHI, enumerator
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| D | SelectionDAG.h | 1048 case ISD::SMUL_LOHI:
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 120 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
148 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
168 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in InitAMDILLowering()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelDAGToDAG.cpp | 294 case ISD::SMUL_LOHI: in selectNode()
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| D | MipsSEISelLowering.cpp | 114 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in MipsSETargetLowering()
125 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Custom); in MipsSETargetLowering()
158 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in MipsSETargetLowering()
205 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in MipsSETargetLowering()
365 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG); in LowerOperation()
410 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMADD()
482 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) in selectMSUB()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | TargetLowering.cpp | 2693 else if (IsAfterLegalization ? isOperationLegal(ISD::SMUL_LOHI, VT) : in BuildSDIV()
2694 isOperationLegalOrCustom(ISD::SMUL_LOHI, VT)) in BuildSDIV()
2695 Q = SDValue(DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(VT, VT), in BuildSDIV()
2815 bool HasSMUL_LOHI = isOperationLegalOrCustom(ISD::SMUL_LOHI, HiLoVT); in expandMUL()
2858 Lo = DAG.getNode(ISD::SMUL_LOHI, dl, DAG.getVTList(HiLoVT, HiLoVT), LL, in expandMUL()
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| D | SelectionDAGDumper.cpp | 174 case ISD::SMUL_LOHI: return "smul_lohi"; in getOperationName()
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| D | LegalizeDAG.cpp | 3555 ISD::SMUL_LOHI; in ExpandNode()
3578 bool HasSMUL_LOHI = TLI.isOperationLegalOrCustom(ISD::SMUL_LOHI, VT); in ExpandNode()
3584 OpToUse = ISD::SMUL_LOHI; in ExpandNode()
3588 OpToUse = ISD::SMUL_LOHI; in ExpandNode()
3684 { ISD::MULHS, ISD::SMUL_LOHI, ISD::SIGN_EXTEND }}; in ExpandNode()
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| D | DAGCombiner.cpp | 1318 case ISD::SMUL_LOHI: return visitSMUL_LOHI(N); in visit()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 103 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom); in XCoreTargetLowering()
220 case ISD::SMUL_LOHI: return LowerSMUL_LOHI(Op, DAG); in LowerOperation()
571 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI && in LowerSMUL_LOHI()
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| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 146 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand); in MSP430TargetLowering()
151 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand); in MSP430TargetLowering()
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| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 124 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in BPFTargetLowering()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1104 case ISD::SMUL_LOHI: in MatchAddressRecursively()
2288 case ISD::SMUL_LOHI: in Select()
2293 bool isSigned = Opcode == ISD::SMUL_LOHI; in Select()
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| D | X86ISelLowering.cpp | 702 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in X86TargetLowering()
813 setOperationAction(ISD::SMUL_LOHI, MVT::v4i32, Custom); in X86TargetLowering()
1133 setOperationAction(ISD::SMUL_LOHI, MVT::v8i32, Custom); in X86TargetLowering()
16037 bool IsSigned = Op->getOpcode() == ISD::SMUL_LOHI; in LowerMUL_LOHI()
17246 case ISD::SMUL_LOHI: return LowerMUL_LOHI(Op, Subtarget, DAG); in LowerOperation()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1304 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in HexagonTargetLowering()
1759 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in HexagonTargetLowering()
1762 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in HexagonTargetLowering()
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 274 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in AMDGPUTargetLowering()
334 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in AMDGPUTargetLowering()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 1549 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in SparcTargetLowering()
1553 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in SparcTargetLowering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 419 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in ARMTargetLowering()
670 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in ARMTargetLowering()
7845 V->getOpcode() == ISD::SMUL_LOHI) in findMUL_LOHI()
7891 AddcOp0->getOpcode() != ISD::SMUL_LOHI && in AddCombineTo64bitMLAL()
7893 AddcOp1->getOpcode() != ISD::SMUL_LOHI) in AddCombineTo64bitMLAL()
7929 unsigned FinalOpc = (Opc == ISD::SMUL_LOHI) ? ARMISD::SMLAL : ARMISD::UMLAL; in AddCombineTo64bitMLAL()
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| D | ARMISelDAGToDAG.cpp | 2641 case ISD::SMUL_LOHI: { in Select()
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 182 setOperationAction(ISD::SMUL_LOHI, VT, Custom); in SystemZTargetLowering()
2722 case ISD::SMUL_LOHI: in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 346 def smullohi : SDNode<"ISD::SMUL_LOHI" , SDTIntBinHiLoOp, [SDNPCommutative]>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 153 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); in PPCTargetLowering()
155 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in PPCTargetLowering()
466 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in PPCTargetLowering()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 239 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand); in AArch64TargetLowering()
591 setOperationAction(ISD::SMUL_LOHI, VT, Expand); in AArch64TargetLowering()
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| /external/llvm/docs/ |
| D | CodeGenerator.rst | 1085 multiple values (e.g. ``SMUL_LOHI``, ``LOAD``, ``CALL``, etc). This is the
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