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Searched refs:SOP2 (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
DSIInstrFormats.td39 : SOP2 <op, (outs SReg_32:$dst), (ins SReg_32:$src0, SReg_32:$src1), opName, pattern>;
42 : SOP2 <op, (outs SReg_64:$dst), (ins SReg_64:$src0, SReg_64:$src1), opName, pattern>;
45 : SOP2 <op, (outs VCCReg:$vcc), (ins SReg_64:$src0, SReg_64:$src1), opName, pattern>;
DSIInstrInfo.td292 class SOP2 <bits<7> op, dag outs, dag ins, string asm, list<dag> pattern> :
304 let EncodingType = 7; // SIInstrEncodingType::SOP2
DSIInstructions.td834 def S_CSELECT_B32 : SOP2 <
/external/llvm/docs/
DR600Usage.rst39 SOP2 Instructions
41 All SOP2 instructions are supported.
/external/llvm/lib/Target/R600/
DSIDefines.h23 SOP2 = 1 << 6, enumerator
DSIInstrFormats.td25 field bits<1> SOP2 = 0;
52 let TSFlags{6} = SOP2;
234 class SOP2 <dag outs, dag ins, string asm, list<dag> pattern> :
242 let SOP2 = 1;
DSIInstrInfo.h155 return get(Opcode).TSFlags & SIInstrFlags::SOP2; in isSOP2()
DSIInstrInfo.td566 SOP2<outs, ins, "", pattern>,
580 SOP2<outs, ins, asm, []>,
587 SOP2<outs, ins, asm, []>,
DSIInstructions.td197 // SOP2 Instructions
2207 // SOP2 Patterns
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
DSIMCCodeEmitter.cpp44 SOP2 = 7, enumerator