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Searched refs:SOPP (Results 1 – 8 of 8) sorted by relevance

/external/llvm/docs/
DR600Usage.rst47 SOPP Instructions
50 Unless otherwise mentioned, all SOPP instructions that have one or more
/external/llvm/lib/Target/R600/
DSIDefines.h26 SOPP = 1 << 9, enumerator
DSIInstrFormats.td28 field bits<1> SOPP = 0;
55 let TSFlags{9} = SOPP;
273 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern = []> :
280 let SOPP = 1;
DSIInstructions.td419 // SOPP Instructions
422 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "s_nop $simm16">;
426 def S_ENDPGM : SOPP <0x00000001, (ins), "s_endpgm",
434 def S_BRANCH : SOPP <
441 def S_CBRANCH_SCC0 : SOPP <
445 def S_CBRANCH_SCC1 : SOPP <
451 def S_CBRANCH_VCCZ : SOPP <
455 def S_CBRANCH_VCCNZ : SOPP <
461 def S_CBRANCH_EXECZ : SOPP <
465 def S_CBRANCH_EXECNZ : SOPP <
[all …]
DSIInstrInfo.h167 return get(Opcode).TSFlags & SIInstrFlags::SOPP; in isSOPP()
/external/mesa3d/src/gallium/drivers/radeon/
DSIInstructions.td601 def S_ENDPGM : SOPP <0x00000001, (ins), "S_ENDPGM",
609 def S_BRANCH : SOPP <
615 def S_CBRANCH_SCC0 : SOPP <
619 def S_CBRANCH_SCC1 : SOPP <
626 def S_CBRANCH_VCCZ : SOPP <
631 def S_CBRANCH_VCCNZ : SOPP <
638 def S_CBRANCH_EXECZ : SOPP <
643 def S_CBRANCH_EXECNZ : SOPP <
655 def S_WAITCNT : SOPP <0x0000000c, (ins i32imm:$simm16), "S_WAITCNT $simm16",
DSIInstrInfo.td335 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern> : Enc32 <
346 let EncodingType = 10; // SIInstrEncodingType::SOPP
/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
DSIMCCodeEmitter.cpp47 SOPP = 10, enumerator