Searched refs:SRLV (Results 1 – 21 of 21) sorted by relevance
/external/valgrind/none/tests/mips64/ |
D | shift_instructions.c | 10 SRA, SRAV, SRL, SRLV enumerator 18 for (op = DROTR; op <= SRLV; op++) { in main() 196 case SRLV: in main()
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/external/v8/src/mips/ |
D | constants-mips.cc | 228 case SRLV: in InstructionType()
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D | constants-mips.h | 377 SRLV = ((0 << 3) + 6), enumerator
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D | disasm-mips.cc | 661 case SRLV: in DecodeTypeRegister()
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D | assembler-mips.cc | 1621 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV); in srlv() 1650 | (rd.code() << kRdShift) | (1 << kSaShift) | SRLV; in rotrv()
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D | simulator-mips.cc | 1946 case SRLV: in ConfigureTypeRegister()
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/external/v8/src/mips64/ |
D | constants-mips64.cc | 235 case SRLV: in InstructionType()
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D | constants-mips64.h | 354 SRLV = ((0 << 3) + 6), enumerator
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D | disasm-mips64.cc | 729 case SRLV: in DecodeTypeRegister()
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D | assembler-mips64.cc | 1685 GenInstrRegister(SPECIAL, rs, rt, rd, 0, SRLV); in srlv() 1714 | (rd.code() << kRdShift) | (1 << kSaShift) | SRLV; in rotrv()
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D | simulator-mips64.cc | 2038 case SRLV: in ConfigureTypeRegister()
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/external/pcre/dist/sljit/ |
D | sljitNativeMIPS_32.c | 332 EMIT_SHIFT(SRL, SRLV); in emit_single_op()
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D | sljitNativeMIPS_64.c | 427 EMIT_SHIFT(DSRL, DSRL32, SRL, DSRLV, SRLV); in emit_single_op()
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D | sljitNativeMIPS_common.c | 168 #define SRLV (HI(0) | LO(6)) macro
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/external/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.td | 1176 def SRLV : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV, srl>, 1639 (SRLV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
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D | MipsISelLowering.cpp | 1287 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicBinaryPartword() 1511 BuildMI(BB, DL, TII->get(Mips::SRLV), SrlRes) in emitAtomicCmpSwapPartword()
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D | Mips16InstrInfo.td | 1252 // Format: SRLV ry, rx MIPS16e
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/external/valgrind/none/tests/mips32/ |
D | MIPS32int.stdout.exp-mips32-BE | 922 SRLV
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D | MIPS32int.stdout.exp-mips32-LE | 922 SRLV
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D | MIPS32int.stdout.exp-mips32r2-LE | 1400 SRLV
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D | MIPS32int.stdout.exp-mips32r2-BE | 1400 SRLV
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