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Searched refs:SWL (Results 1 – 14 of 14) sorted by relevance

/external/v8/src/mips/
Dconstants-mips.cc320 case SWL: in InstructionType()
Dconstants-mips.h353 SWL = ((5 << 3) + 2) << kOpcodeShift, enumerator
Ddisasm-mips.cc1199 case SWL: in DecodeTypeImmediate()
Dsimulator-mips.cc2893 case SWL: { in DecodeTypeImmediate()
2978 case SWL: in DecodeTypeImmediate()
Dassembler-mips.cc1757 GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_); in swl()
/external/v8/src/mips64/
Dconstants-mips64.cc340 case SWL: in InstructionType()
Dconstants-mips64.h324 SWL = ((5 << 3) + 2) << kOpcodeShift, enumerator
Ddisasm-mips64.cc1345 case SWL: in DecodeTypeImmediate()
Dsimulator-mips64.cc3040 case SWL: { in DecodeTypeImmediate()
3131 case SWL: in DecodeTypeImmediate()
Dassembler-mips64.cc1894 GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_); in swl()
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsNaClELFStreamer.cpp232 case Mips::SWL: in isBasePlusOffsetMemoryAccess()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.h200 SWL, enumerator
DMipsISelLowering.cpp150 case MipsISD::SWL: return "MipsISD::SWL"; in getTargetNodeName()
2230 SDValue SWL = createStoreLR(MipsISD::SWL, DAG, SD, Chain, in lowerUnalignedIntStore() local
2232 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); in lowerUnalignedIntStore()
DMipsInstrInfo.td133 def MipsSWL : SDNode<"MipsISD::SWL", SDTStore,
1213 def SWL : StoreLeftRight<"swl", MipsSWL, GPR32Opnd, II_SWL>, LW_FM<0x2a>,