Searched refs:SWL (Results 1 – 14 of 14) sorted by relevance
/external/v8/src/mips/ |
D | constants-mips.cc | 320 case SWL: in InstructionType()
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D | constants-mips.h | 353 SWL = ((5 << 3) + 2) << kOpcodeShift, enumerator
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D | disasm-mips.cc | 1199 case SWL: in DecodeTypeImmediate()
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D | simulator-mips.cc | 2893 case SWL: { in DecodeTypeImmediate() 2978 case SWL: in DecodeTypeImmediate()
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D | assembler-mips.cc | 1757 GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_); in swl()
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/external/v8/src/mips64/ |
D | constants-mips64.cc | 340 case SWL: in InstructionType()
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D | constants-mips64.h | 324 SWL = ((5 << 3) + 2) << kOpcodeShift, enumerator
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D | disasm-mips64.cc | 1345 case SWL: in DecodeTypeImmediate()
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D | simulator-mips64.cc | 3040 case SWL: { in DecodeTypeImmediate() 3131 case SWL: in DecodeTypeImmediate()
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D | assembler-mips64.cc | 1894 GenInstrImmediate(SWL, rs.rm(), rd, rs.offset_); in swl()
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
D | MipsNaClELFStreamer.cpp | 232 case Mips::SWL: in isBasePlusOffsetMemoryAccess()
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/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 200 SWL, enumerator
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D | MipsISelLowering.cpp | 150 case MipsISD::SWL: return "MipsISD::SWL"; in getTargetNodeName() 2230 SDValue SWL = createStoreLR(MipsISD::SWL, DAG, SD, Chain, in lowerUnalignedIntStore() local 2232 return createStoreLR(MipsISD::SWR, DAG, SD, SWL, IsLittle ? 0 : 3); in lowerUnalignedIntStore()
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D | MipsInstrInfo.td | 133 def MipsSWL : SDNode<"MipsISD::SWL", SDTStore, 1213 def SWL : StoreLeftRight<"swl", MipsSWL, GPR32Opnd, II_SWL>, LW_FM<0x2a>,
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