| /external/llvm/test/CodeGen/CPP/ |
| D | atomic.ll | 5 …[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Xchg, {{.*}}, SequentiallyConsistent, CrossThre…
10 …:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Add, {{.*}}, SequentiallyConsistent, CrossThre…
30 …T:[a-zA-Z0-9_]+]] = new AtomicRMWInst(AtomicRMWInst::Or, {{.*}}, SequentiallyConsistent, SingleThr…
65 …XchgInst* [[INST:[a-zA-Z0-9_]+]] = new AtomicCmpXchgInst({{.*}}, SequentiallyConsistent, Monotonic…
77 …XchgInst* [[INST:[a-zA-Z0-9_]+]] = new AtomicCmpXchgInst({{.*}}, SequentiallyConsistent, Monotonic…
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| /external/llvm/docs/ |
| D | Atomics.rst | 37 stated order. A couple examples: if a SequentiallyConsistent store is
38 immediately followed by another SequentiallyConsistent store to the same
119 equivalent to a Release store. SequentiallyConsistent fences behave as both
328 SequentiallyConsistent section in Atomic orderings
331 SequentiallyConsistent (``seq_cst`` in IR) provides Acquire semantics for loads
333 ordering exists between all SequentiallyConsistent operations.
346 SequentiallyConsistent loads and stores, the same reorderings are allowed as
347 for Acquire loads and Release stores, except that SequentiallyConsistent
351 SequentiallyConsistent loads minimally require the same barriers as Acquire
352 operations and SequentiallyConsistent stores require Release
[all …]
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| /external/clang/lib/CodeGen/ |
| D | CGAtomic.cpp | 214 llvm::AtomicOrdering Success = llvm::SequentiallyConsistent,
215 llvm::AtomicOrdering Failure = llvm::SequentiallyConsistent,
240 llvm::AtomicOrdering Success = llvm::SequentiallyConsistent,
241 llvm::AtomicOrdering Failure = llvm::SequentiallyConsistent);
245 llvm::AtomicOrdering Success = llvm::SequentiallyConsistent,
246 llvm::AtomicOrdering Failure = llvm::SequentiallyConsistent,
264 case llvm::SequentiallyConsistent: in translateAtomicOrdering()
408 FailureOrder = llvm::SequentiallyConsistent; in emitAtomicCmpXchgFailureSet()
427 if (SuccessOrder == llvm::SequentiallyConsistent) in emitAtomicCmpXchgFailureSet()
457 Size, Align, SuccessOrder, llvm::SequentiallyConsistent); in emitAtomicCmpXchgFailureSet()
[all …]
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| D | CGBuiltin.cpp | 110 llvm::SequentiallyConsistent); in EmitBinaryAtomic()
145 llvm::SequentiallyConsistent); in EmitBinaryAtomicPost()
1065 llvm::SequentiallyConsistent, in EmitBuiltinExpr()
1066 llvm::SequentiallyConsistent); in EmitBuiltinExpr()
1092 llvm::SequentiallyConsistent, in EmitBuiltinExpr()
1093 llvm::SequentiallyConsistent); in EmitBuiltinExpr()
1140 Builder.CreateFence(llvm::SequentiallyConsistent); in EmitBuiltinExpr()
1209 llvm::SequentiallyConsistent); in EmitBuiltinExpr()
1227 llvm::AcquireRelease, llvm::SequentiallyConsistent in EmitBuiltinExpr()
1279 Store->setOrdering(llvm::SequentiallyConsistent); in EmitBuiltinExpr()
[all …]
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| D | CGStmtOpenMP.cpp | 1426 IsSeqCst ? llvm::SequentiallyConsistent in EmitOMPAtomicReadExpr()
1461 IsSeqCst ? llvm::SequentiallyConsistent in EmitOMPAtomicWriteExpr()
1597 auto AO = IsSeqCst ? llvm::SequentiallyConsistent : llvm::Monotonic; in EmitOMPAtomicUpdateExpr()
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| D | CGExprScalar.cpp | 1656 llvm::SequentiallyConsistent)); in EmitScalarPrePostIncDec()
1662 LV.getAddress(), True, llvm::SequentiallyConsistent); in EmitScalarPrePostIncDec()
1679 LV.getAddress(), amt, llvm::SequentiallyConsistent); in EmitScalarPrePostIncDec()
2159 llvm::SequentiallyConsistent); in EmitCompoundAssignLValue()
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| D | CodeGenFunction.h | 2228 llvm::AtomicOrdering Success = llvm::SequentiallyConsistent,
2229 llvm::AtomicOrdering Failure = llvm::SequentiallyConsistent,
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| /external/llvm/include/llvm/IR/ |
| D | Instructions.h | 45 SequentiallyConsistent = 7 enumerator
58 Ord == SequentiallyConsistent); in isAtLeastAcquire()
66 Ord == SequentiallyConsistent); in isAtLeastRelease()
606 case SequentiallyConsistent:
607 return SequentiallyConsistent;
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| /external/llvm/lib/Transforms/Instrumentation/ |
| D | ThreadSanitizer.cpp | 461 case SequentiallyConsistent: v = 5; break; in createOrdering()
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| D | MemorySanitizer.cpp | 1173 case SequentiallyConsistent: in addReleaseOrdering()
1174 return SequentiallyConsistent; in addReleaseOrdering()
1190 case SequentiallyConsistent: in addAcquireOrdering()
1191 return SequentiallyConsistent; in addAcquireOrdering()
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| /external/llvm/lib/IR/ |
| D | AsmWriter.cpp | 2054 case SequentiallyConsistent: Out << " seq_cst"; break; in writeAtomic()
2075 case SequentiallyConsistent: Out << " seq_cst"; break; in writeAtomicCmpXchg()
2085 case SequentiallyConsistent: Out << " seq_cst"; break; in writeAtomicCmpXchg()
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| D | Core.cpp | 2490 return SequentiallyConsistent; in mapFromLLVMOrdering()
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| D | Verifier.cpp | 2671 Ordering == AcquireRelease || Ordering == SequentiallyConsistent, in visitFenceInst()
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| /external/llvm/bindings/ocaml/llvm/ |
| D | llvm.ml | 242 | SequentiallyConsistent Constructor
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| D | llvm.mli | 307 | SequentiallyConsistent Constructor
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| /external/llvm/lib/Target/CppBackend/ |
| D | CPPBackend.cpp | 1101 case SequentiallyConsistent: return "SequentiallyConsistent"; in ConvertAtomicOrdering()
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| /external/llvm/test/Bindings/OCaml/ |
| D | core.ml | 1395 AtomicOrdering.SequentiallyConsistent false "build_atomicrmw"
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| /external/llvm/lib/Bitcode/Writer/ |
| D | BitcodeWriter.cpp | 131 case SequentiallyConsistent: return bitc::ORDERING_SEQCST; in GetEncodedOrdering()
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| /external/llvm/lib/Bitcode/Reader/ |
| D | BitcodeReader.cpp | 660 case bitc::ORDERING_SEQCST: return SequentiallyConsistent; in GetDecodedOrdering()
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| /external/llvm/lib/AsmParser/ |
| D | LLParser.cpp | 1615 case lltok::kw_seq_cst: Ordering = SequentiallyConsistent; break; in ParseOrdering()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 11043 case SequentiallyConsistent: in emitLeadingFence()
11073 case SequentiallyConsistent: in emitTrailingFence()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 7808 if (Ord == SequentiallyConsistent) in emitLeadingFence()
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 16813 if (FenceOrdering == SequentiallyConsistent && FenceScope == CrossThread) { in LowerATOMIC_FENCE()
17085 if (cast<AtomicSDNode>(Node)->getOrdering() == SequentiallyConsistent || in LowerATOMIC_STORE()
|