Searched refs:Shift1Reg (Results 1 – 1 of 1) sorted by relevance
7955 unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local7999 BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg).addReg(Ptr1Reg) in EmitPartwordAtomicBinary()8002 .addReg(Shift1Reg).addImm(is8bit ? 24 : 16); in EmitPartwordAtomicBinary()8671 unsigned Shift1Reg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local8725 BuildMI(BB, dl, TII->get(PPC::RLWINM), Shift1Reg).addReg(Ptr1Reg) in EmitInstrWithCustomInserter()8728 .addReg(Shift1Reg).addImm(is8bit ? 24 : 16); in EmitInstrWithCustomInserter()