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Searched refs:ShiftImm (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp492 unsigned ShiftImm; // shift for OffsetReg. member
502 unsigned ShiftImm; member
514 unsigned ShiftImm; member
520 unsigned ShiftImm; member
1271 Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 || in isMemTBH()
1288 if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3) in isT2MemRegOffset()
1809 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
1818 unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm); in addRegShiftedImmOperands()
2131 Memory.ShiftImm, Memory.ShiftType); in addAddrMode2Operands()
2310 Memory.ShiftImm, Memory.ShiftType); in addMemRegOffsetOperands()
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/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp170 uint64_t ShiftImm, bool SetFlags = false,
175 uint64_t ShiftImm, bool SetFlags = false,
201 AArch64_AM::ShiftExtendType ShiftType, uint64_t ShiftImm,
209 uint64_t ShiftImm);
1273 unsigned ShiftImm; in emitAddSub_ri() local
1275 ShiftImm = 0; in emitAddSub_ri()
1277 ShiftImm = 12; in emitAddSub_ri()
1306 .addImm(getShifterImm(AArch64_AM::LSL, ShiftImm)); in emitAddSub_ri()
1314 uint64_t ShiftImm, bool SetFlags, in emitAddSub_rs() argument
1343 .addImm(getShifterImm(ShiftType, ShiftImm)); in emitAddSub_rs()
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/external/llvm/lib/Target/ARM/
DARMFastISel.cpp2767 unsigned ShiftImm; in SelectShift() local
2770 ShiftImm = CI->getZExtValue(); in SelectShift()
2774 if (ShiftImm == 0 || ShiftImm >=32) in SelectShift()
2798 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); in SelectShift()
/external/llvm/lib/Target/Mips/
DMipsISelLowering.cpp1135 int64_t ShiftImm = 32 - (Size * 8); in emitSignExtendToI32InReg() local
1137 BuildMI(BB, DL, TII->get(Mips::SLL), ScrReg).addReg(SrcReg).addImm(ShiftImm); in emitSignExtendToI32InReg()
1138 BuildMI(BB, DL, TII->get(Mips::SRA), DstReg).addReg(ScrReg).addImm(ShiftImm); in emitSignExtendToI32InReg()