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Searched refs:SparseBitVector (Results 1 – 9 of 9) sorted by relevance

/external/llvm/include/llvm/ADT/
DSparseBitVector.h263 class SparseBitVector {
312 const SparseBitVector<ElementSize> *BitVector;
418 SparseBitVectorIterator(const SparseBitVector<ElementSize> *RHS,
431 SparseBitVector () {
435 ~SparseBitVector() {
439 SparseBitVector(const SparseBitVector &RHS) {
455 SparseBitVector& operator=(const SparseBitVector& RHS) {
544 bool operator!=(const SparseBitVector &RHS) const {
548 bool operator==(const SparseBitVector &RHS) const {
561 bool operator|=(const SparseBitVector &RHS) {
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/external/llvm/include/llvm/CodeGen/
DLiveIntervalUnion.h29 template <unsigned Element> class SparseBitVector; variable
30 typedef SparseBitVector<128> LiveVirtRegBitSet;
DLiveVariables.h84 SparseBitVector<> AliveBlocks;
125 SparseBitVector<> PHIJoins;
/external/llvm/unittests/ADT/
DSparseBitVectorTest.cpp18 SparseBitVector<> Vec; in TEST()
/external/llvm/utils/TableGen/
DCodeGenRegisters.h200 typedef SparseBitVector<> RegUnitList;
DRegisterInfoEmitter.cpp576 DiffVec &diffEncode(DiffVec &V, unsigned InitVal, SparseBitVector<> List) { in diffEncode()
852 SparseBitVector<> RUs = Reg.getNativeRegUnits(); in runMCDesc()
DCodeGenRegisters.cpp1430 SparseBitVector<> &NormalRegs, in normalizeWeight()
1505 SparseBitVector<> NormalRegs; in computeRegUnitWeights()
/external/llvm/lib/CodeGen/
DLiveVariables.cpp70 for (SparseBitVector<>::iterator I = AliveBlocks.begin(), in dump()
/external/llvm/docs/
DProgrammersManual.rst1495 Bit storage containers (BitVector, SparseBitVector)
1535 SparseBitVector argument
1538 The SparseBitVector container is much like BitVector, with one major difference:
1539 Only the bits that are set, are stored. This makes the SparseBitVector much
1542 downside to the SparseBitVector is that setting and testing of random bits is
1547 testing/setting bits in a SparseBitVector is O(distance away from last set bit).