| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 484 unsigned SplatBitSize; in selectVSplat() local
487 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in selectVSplat()
876 unsigned SplatBitSize; in selectNode() local
885 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in selectNode()
890 switch (SplatBitSize) { in selectNode()
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| D | MipsSEISelLowering.cpp | 607 unsigned SplatBitSize; in isVSplat() local
610 if (!Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in isVSplat()
632 unsigned SplatBitSize; in isVectorAllOnes() local
637 if (BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs)) in isVectorAllOnes()
852 unsigned SplatBitSize; in performDSPShiftCombine() local
861 !BV->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, HasAnyUndefs, in performDSPShiftCombine()
863 (SplatBitSize != EltSize) || in performDSPShiftCombine()
2325 unsigned SplatBitSize; in lowerBUILD_VECTOR() local
2331 if (Node->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in lowerBUILD_VECTOR()
2333 !Subtarget.isLittle()) && SplatBitSize <= 64) { in lowerBUILD_VECTOR()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4484 unsigned SplatBitSize, SelectionDAG &DAG, in isNEONModifiedImm() argument
4494 SplatBitSize = 32; in isNEONModifiedImm()
4496 switch (SplatBitSize) { in isNEONModifiedImm()
4977 unsigned SplatBitSize; in LowerBUILD_VECTOR() local
4979 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in LowerBUILD_VECTOR()
4980 if (SplatBitSize <= 64) { in LowerBUILD_VECTOR()
4984 SplatUndef.getZExtValue(), SplatBitSize, in LowerBUILD_VECTOR()
4995 SplatUndef.getZExtValue(), SplatBitSize, in LowerBUILD_VECTOR()
5004 if ((VT == MVT::v2f32 || VT == MVT::v4f32) && SplatBitSize == 32) { in LowerBUILD_VECTOR()
8194 unsigned SplatBitSize; in PerformANDCombine() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2018 unsigned SplatBitSize; in LowerBUILD_VECTOR() local
2024 (BVN->isConstantSplat(APSplatBits, APSplatUndef, SplatBitSize, in LowerBUILD_VECTOR()
2025 HasAnyUndefs, 0, true) && SplatBitSize <= 16)) { in LowerBUILD_VECTOR()
2027 int32_t SextVal = ((int32_t) (SplatBits << (32 - SplatBitSize)) >> in LowerBUILD_VECTOR()
2028 (32 - SplatBitSize)); in LowerBUILD_VECTOR()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5335 unsigned SplatBitSize; in resolveBuildVector() local
5337 if (BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, HasAnyUndefs)) { in resolveBuildVector()
5338 unsigned NumSplats = VT.getSizeInBits() / SplatBitSize; in resolveBuildVector()
5341 CnstBits <<= SplatBitSize; in resolveBuildVector()
5342 UndefBits <<= SplatBitSize; in resolveBuildVector()
6203 unsigned SplatBitSize; in getVShiftImm() local
6205 if (!BVN || !BVN->isConstantSplat(SplatBits, SplatUndef, SplatBitSize, in getVShiftImm()
6207 SplatBitSize > ElementBits) in getVShiftImm()
7717 unsigned SplatBitSize; in tryCombineShiftImm() local
7719 if (!BVN->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in tryCombineShiftImm()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 701 unsigned SplatBitSize; in isConstantSplatVector() local
704 return (C->isConstantSplat(SplatValue, SplatUndef, SplatBitSize, in isConstantSplatVector()
706 EltVT.getSizeInBits() >= SplatBitSize); in isConstantSplatVector()
2894 unsigned SplatBitSize; in visitAND() local
2897 SplatBitSize, HasAnyUndefs); in visitAND()
2913 if (BitWidth > SplatBitSize) in visitAND()
2915 SplatBitSize < BitWidth; in visitAND()
2916 SplatBitSize = SplatBitSize * 2) in visitAND()
2917 SplatValue |= SplatValue.shl(SplatBitSize); in visitAND()
2921 if (SplatBitSize % BitWidth == 0) { in visitAND()
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| D | SelectionDAG.cpp | 6796 unsigned &SplatBitSize, in isConstantSplat() argument
6856 SplatBitSize = sz; in isConstantSplat()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6671 unsigned SplatBitSize; in LowerBUILD_VECTOR() local
6673 if (! BVN->isConstantSplat(APSplatBits, APSplatUndef, SplatBitSize, in LowerBUILD_VECTOR()
6675 SplatBitSize > 32) in LowerBUILD_VECTOR()
6680 unsigned SplatSize = SplatBitSize / 8; in LowerBUILD_VECTOR()
6696 int32_t SextVal= (int32_t(SplatBits << (32-SplatBitSize)) >> in LowerBUILD_VECTOR()
6697 (32-SplatBitSize)); in LowerBUILD_VECTOR()
6755 unsigned TypeShiftAmt = i & (SplatBitSize-1); in LowerBUILD_VECTOR()
6792 ((unsigned)i >> (SplatBitSize-TypeShiftAmt)))) { in LowerBUILD_VECTOR()
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| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGNodes.h | 1609 unsigned &SplatBitSize, bool &HasAnyUndefs,
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 22188 unsigned SplatBitSize; in VectorZextCombine() local
22191 SplatBitSize, HasAnyUndefs)) in VectorZextCombine()
22196 if (SplatBitSize > ResSize || in VectorZextCombine()
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