Searched refs:Src0VT (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/R600/ |
| D | SIInstrInfo.td | 913 field ValueType Src0VT = ArgVT[1];
917 field RegisterOperand Src0RC32 = getVOPSrc0ForVT<Src0VT>.ret;
919 field RegisterOperand Src0RC64 = getVOP3SrcForVT<Src0VT>.ret;
924 field bit HasModifiers = hasModifiers<Src0VT>.ret;
1303 [(set P.DstVT:$dst, (node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0,
1305 [(set P.DstVT:$dst, (node P.Src0VT:$src0))]),
1316 [(set P.DstVT:$dst, (node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0,
1318 [(set P.DstVT:$dst, (node P.Src0VT:$src0))]),
1341 (node (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
1344 [(set P.DstVT:$dst, (node P.Src0VT:$src0, P.Src1VT:$src1))]),
[all …]
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1360 EVT Src0VT = Src0.getValueType(); in SplitVecOp_VSELECT() local
1370 std::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(Src0VT); in SplitVecOp_VSELECT()
1383 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect); in SplitVecOp_VSELECT()
|