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Searched refs:Src1Reg (Results 1 – 6 of 6) sorted by relevance

/external/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp278 unsigned Src1Reg = MI->getOperand(2).getReg(); in ExpandFPMLxInstruction() local
294 .addReg(Src1Reg, getKillRegState(Src1Kill)) in ExpandFPMLxInstruction()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp595 unsigned Src1Reg = MI->getOperand(1).getReg(); in expandPostRAPseudo() local
597 unsigned Src1SubHi = TRI.getSubReg(Src1Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
598 unsigned Src1SubLo = TRI.getSubReg(Src1Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
617 unsigned Src1Reg = MI->getOperand(1).getReg(); in expandPostRAPseudo() local
620 unsigned Src1SubHi = TRI.getSubReg(Src1Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
621 unsigned Src1SubLo = TRI.getSubReg(Src1Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp2562 unsigned Src1Reg = getRegForValue(Src1Val); in optimizeSelect() local
2563 if (!Src1Reg) in optimizeSelect()
2573 Src1Reg = emitLogicalOp_ri(ISD::XOR, MVT::i32, Src1Reg, Src1IsKill, 1); in optimizeSelect()
2576 unsigned ResultReg = fastEmitInst_rr(Opc, &AArch64::GPR32spRegClass, Src1Reg, in optimizeSelect()
2689 unsigned Src1Reg = getRegForValue(SI->getTrueValue()); in selectSelect() local
2695 if (!Src1Reg || !Src2Reg) in selectSelect()
2699 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
2703 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
4468 unsigned Src1Reg = getRegForValue(I->getOperand(1)); in selectRem() local
4469 if (!Src1Reg) in selectRem()
[all …]
/external/llvm/lib/Target/R600/
DR600InstrInfo.h244 unsigned Src1Reg = 0) const;
DR600InstrInfo.cpp1186 unsigned Src1Reg) const { in buildDefaultInstruction()
1190 if (Src1Reg) { in buildDefaultInstruction()
1204 if (Src1Reg) { in buildDefaultInstruction()
1205 MIB.addReg(Src1Reg) // $src1 in buildDefaultInstruction()
DSIInstrInfo.cpp953 unsigned Src1Reg = Src1->getReg(); in FoldImmediate() local
957 Src0->setReg(Src1Reg); in FoldImmediate()