Searched refs:TCL_OUTPUT_VTXFMT (Results 1 – 6 of 6) sorted by relevance
248 vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & in radeonEmitArrays()281 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { in radeonEmitArrays()283 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx; in radeonEmitArrays()
316 GLuint vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & in radeonEmitArrays()366 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { in radeonEmitArrays()368 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx; in radeonEmitArrays()
570 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC; in radeonUpdateSpecular()571 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_DIFFUSE; in radeonUpdateSpecular()583 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC; in radeonUpdateSpecular()584 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; in radeonUpdateSpecular()592 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; in radeonUpdateSpecular()595 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC; in radeonUpdateSpecular()596 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; in radeonUpdateSpecular()599 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; in radeonUpdateSpecular()603 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC; in radeonUpdateSpecular()
170 #define TCL_OUTPUT_VTXFMT 1 macro
746 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~(RADEON_ST_BIT(unit) | in disable_tex_obj_state()918 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_Q_BIT(unit); in radeon_validate_texgen()1076 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_ST_BIT(unit); in radeon_validate_texture()
831 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = in radeonInitState()