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Searched refs:TCL_UCP_VERT_BLEND_CTL (Results 1 – 7 of 7) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_state.c326 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_TCL_FOG_MASK; in radeonFogfv()
329 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_LINEAR; in radeonFogfv()
332 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_EXP; in radeonFogfv()
335 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_EXP2; in radeonFogfv()
404 GLuint t = rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL]; in radeonCullFace()
431 if ( rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] != t ) { in radeonCullFace()
433 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = t; in radeonCullFace()
446 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_CULL_FRONT_IS_CCW; in radeonFrontFace()
454 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_CULL_FRONT_IS_CCW; in radeonFrontFace()
1058 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_LIGHT_TWOSIDE; in radeonLightModelfv()
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Dradeon_context.h174 #define TCL_UCP_VERT_BLEND_CTL 5 macro
Dradeon_state_init.c855 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = in radeonInitState()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_state.c391 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~R200_TCL_FOG_MASK; in r200Fogfv()
394 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= R200_TCL_FOG_LINEAR; in r200Fogfv()
405 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= R200_TCL_FOG_EXP; in r200Fogfv()
410 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= R200_TCL_FOG_EXP2; in r200Fogfv()
496 GLuint t = rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL]; in r200CullFace()
523 if ( rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] != t ) { in r200CullFace()
525 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = t; in r200CullFace()
538 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~R200_CULL_FRONT_IS_CCW; in r200FrontFace()
546 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= R200_CULL_FRONT_IS_CCW; in r200FrontFace()
1757 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= (R200_UCP_ENABLE_0<<p); in r200Enable()
[all …]
Dr200_context.h260 #define TCL_UCP_VERT_BLEND_CTL 8 macro
Dr200_vertprog.c1149 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= (ctx->Transform.ClipPlanesEnabled << 2); in r200SetupVertexProg()
1152 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~(0xfc); in r200SetupVertexProg()
Dr200_state_init.c1192 rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = in r200InitState()