Searched refs:TGSI_OPCODE_AND (Results 1 – 11 of 11) sorted by relevance
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_info.c | 129 { 1, 2, 0, 0, 0, 0, COMP, "AND", TGSI_OPCODE_AND },
274 case TGSI_OPCODE_AND: in tgsi_opcode_infer_src_type()
323 case TGSI_OPCODE_AND: in tgsi_opcode_infer_dst_type()
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| D | tgsi_util.c | 216 case TGSI_OPCODE_AND: in tgsi_util_get_inst_usage_mask()
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| D | tgsi_exec.c | 3910 case TGSI_OPCODE_AND: in exec_instruction()
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| /external/mesa3d/src/gallium/include/pipe/ |
| D | p_shader_tokens.h | 344 #define TGSI_OPCODE_AND 89 macro
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| /external/mesa3d/src/mesa/state_tracker/ |
| D | st_glsl_to_tgsi.cpp | 1558 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); in visit()
1564 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); in visit()
1568 emit(ir, TGSI_OPCODE_AND, temp_dst, temp1, temp2); in visit()
1573 emit(ir, TGSI_OPCODE_AND, result_dst, temp1, temp2); in visit()
1732 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); in visit()
1764 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_float(1.0)); in visit()
1779 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], st_src_reg_for_int(1)); in visit()
1862 emit(ir, TGSI_OPCODE_AND, result_dst, op[0], op[1]); in visit()
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_tgsi_aos.c | 914 case TGSI_OPCODE_AND: in lp_emit_instruction_aos()
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| D | lp_bld_tgsi_action.c | 1565 bld_base->op_actions[TGSI_OPCODE_AND].emit = and_emit_cpu; in lp_set_default_actions_cpu()
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| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| D | nv50_ir_from_tgsi.cpp | 364 case TGSI_OPCODE_AND: in inferSrcType()
1754 case TGSI_OPCODE_AND: in handleInstruction()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_setup_tgsi_llvm.c | 1058 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and; in radeon_llvm_context_init()
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| /external/mesa3d/src/gallium/drivers/r600/ |
| D | r600_shader.c | 5335 {TGSI_OPCODE_AND, 0, V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2},
5509 {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2},
5683 {TGSI_OPCODE_AND, 0, EG_V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_AND_INT, tgsi_op2},
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| /external/mesa3d/src/gallium/drivers/svga/ |
| D | svga_tgsi_insn.c | 2655 case TGSI_OPCODE_AND: in svga_emit_instruction()
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