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Searched refs:Thumb (Results 1 – 25 of 82) sorted by relevance

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/external/llvm/test/CodeGen/Thumb/
Dsegmented-stacks.ll1 …s -mtriple=thumb-linux-androideabi -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-android
2 …-mtriple=thumb-linux-unknown-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-linux
15 ; Thumb-android: test_basic:
17 ; Thumb-android: push {r4, r5}
18 ; Thumb-android-NEXT: mov r5, sp
19 ; Thumb-android-NEXT: ldr r4, .LCPI0_0
20 ; Thumb-android-NEXT: ldr r4, [r4]
21 ; Thumb-android-NEXT: cmp r4, r5
22 ; Thumb-android-NEXT: blo .LBB0_2
24 ; Thumb-android: mov r4, #48
[all …]
Dsegmented-stacks-dynamic.ll1 …-mtriple=thumb-linux-unknown-gnueabi -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-linux
2 …s -mtriple=thumb-linux-androideabi -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-android
23 ; Thumb-linux: test_basic:
25 ; Thumb-linux: push {r4, r5}
26 ; Thumb-linux: mov r5, sp
27 ; Thumb-linux-NEXT: ldr r4, .LCPI0_0
28 ; Thumb-linux-NEXT: ldr r4, [r4]
29 ; Thumb-linux-NEXT: cmp r4, r5
30 ; Thumb-linux-NEXT: blo .LBB0_2
32 ; Thumb-linux: mov r4, #16
[all …]
Dinlineasm-imm-thumb.ll3 ; Test Thumb-mode "I" constraint, for ADD immediate.
9 ; Test Thumb-mode "J" constraint, for negated ADD immediates.
15 ; Test Thumb-mode "K" constraint, for compatibility with GCC's internal use.
21 ; Test Thumb-mode "L" constraint, for 3-operand ADD immediates.
27 ; Test Thumb-mode "M" constraint, for "ADD r = sp + imm".
33 ; Test Thumb-mode "N" constraint, for values between 0 and 31.
39 ; Test Thumb-mode "O" constraint, for "ADD sp = sp + imm".
/external/llvm/test/CodeGen/Thumb2/
Dsegmented-stacks.ll1 …b -mcpu=arm1156t2-s -mattr=+thumb2 -verify-machineinstrs | FileCheck %s -check-prefix=Thumb-android
13 ; Thumb-android: test_basic:
15 ; Thumb-android: push {r4, r5}
16 ; Thumb-android-NEXT: mrc p15, #0, r4, c13, c0, #3
17 ; Thumb-android-NEXT: mov r5, sp
18 ; Thumb-android-NEXT: ldr r4, [r4, #252]
19 ; Thumb-android-NEXT: cmp r4, r5
20 ; Thumb-android-NEXT: blo .LBB0_2
22 ; Thumb-android: mov r4, #48
23 ; Thumb-android-NEXT: mov r5, #0
[all …]
/external/llvm/lib/Target/ARM/
DREADME-Thumb.txt2 // Random ideas for the ARM backend (Thumb specific).
5 * Add support for compiling functions in both ARM and Thumb mode, then taking
12 * Thumb doesn't have normal pre/post increment addressing modes, but you can
32 * Thumb jumptable codegen can improve given some help from the assembler. This
214 etc. Almost all Thumb instructions clobber condition code.
218 Thumb load / store address mode offsets are scaled. The values kept in the
DARMFrameLowering.cpp1868 bool Thumb = ST->isThumb(); in adjustForSegmentedStacks() local
1935 if (Thumb) { in adjustForSegmentedStacks()
1960 if (Thumb) { in adjustForSegmentedStacks()
1969 if (!CompareStackPointer && Thumb) { in adjustForSegmentedStacks()
1978 if (Thumb && ST->isThumb1Only()) { in adjustForSegmentedStacks()
2014 Opcode = Thumb ? ARM::tCMPr : ARM::CMPrr; in adjustForSegmentedStacks()
2020 Opcode = Thumb ? ARM::tBcc : ARM::Bcc; in adjustForSegmentedStacks()
2032 if (Thumb) { in adjustForSegmentedStacks()
2041 if (Thumb) { in adjustForSegmentedStacks()
2052 if (Thumb) { in adjustForSegmentedStacks()
[all …]
/external/llvm/test/MC/ARM/
Darm-thumb-cpus.s30 @ CHECK-ARM-ONLY: target does not support Thumb mode
31 @ CHECK-ARM-ONLY: target does not support Thumb mode
Dinst-thumb-suffixes.s12 @ CHECK-ERROR: cannot determine Thumb instruction size, use inst.n/inst.w instead
Dthumb2-diagnostics.s92 @ CHECK-ERRORS: error: 'asr #32' shift amount not allowed in Thumb mode
93 @ CHECK-ERRORS: error: 'asr #32' shift amount not allowed in Thumb mode
Ddirective-arch-armv7.s27 @ CHECK-ATTR: Description: Thumb-2
Dmode-switch.s1 @ Test ARM / Thumb mode switching with .code
Ddirective-arch-armv6-m.s27 @ CHECK-ATTR: Description: Thumb-1
Ddirective-arch-armv6t2.s31 @ CHECK-ATTR: Description: Thumb-2
Ddirective-arch-armv6.s31 @ CHECK-ATTR: Description: Thumb-1
Ddirective-arch-armv4t.s31 @ CHECK-ATTR: Description: Thumb-1
Ddirective-arch-armv5te.s31 @ CHECK-ATTR: Description: Thumb-1
Ddirective-arch-armv6k.s31 @ CHECK-ATTR: Description: Thumb-1
/external/llvm/test/CodeGen/ARM/
Dgpr-paired-spill-thumbinst.ll4 ; This test makes sure spills of 64-bit pairs in Thumb mode actually
17 ; Make sure we are actually creating the Thumb versions of the spill
Dfast-isel-ext.ll9 ; Can't test pre-ARMv6 Thumb because ARM FastISel currently only supports
10 ; Thumb2. The ARMFastISel::ARMEmitIntExt code should work for Thumb by always
13 ; Note that lsl, asr and lsr in Thumb are all encoded as 16-bit instructions
Dfastisel-thumb-litpool.ll3 ; We used to accidentally create both an ARM and a Thumb ldr here. It led to an
/external/lzma/
DMethods.txt33 08 - ARM Thumb (little endian)
60 07 - ARM Thumb
/external/jhead/
Djpgfile.c593 int ReplaceThumbnailFromBuffer(const char * Thumb, int ThumbLen) in ReplaceThumbnailFromBuffer() argument
600 if (Thumb == NULL){ in ReplaceThumbnailFromBuffer()
615 if (Thumb) { in ReplaceThumbnailFromBuffer()
636 if (Thumb){ in ReplaceThumbnailFromBuffer()
637 memcpy(ThumbnailPointer, Thumb, ThumbLen); in ReplaceThumbnailFromBuffer()
/external/llvm/test/Object/ARM/
Dsymbol-addr.ll6 ; Check that the symbol address does not include the ARM/Thumb instruction
/external/valgrind/docs/internals/
Darm_thumb_notes_gdbserver.txt29 * Thumb bit in IstMark:
43 * Thumb bit in extents
74 (see Thumb bit in IstMark above).
/external/elfutils/src/tests/
Drun-readelf-A.sh40 THUMB_ISA_use: Thumb-2

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