Searched refs:UCVTF (Results 1 – 7 of 7) sorted by relevance
/external/v8/src/arm64/ |
D | constants-arm64.h | 1190 UCVTF = FPIntegerConvertFixed | 0x00030000, enumerator 1191 UCVTF_sw = UCVTF, 1192 UCVTF_sx = UCVTF | SixtyFourBits, 1193 UCVTF_dw = UCVTF | FP64, 1194 UCVTF_dx = UCVTF | SixtyFourBits | FP64,
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D | assembler-arm64.cc | 2060 Emit(SF(rn) | FPType(fd) | UCVTF | Rn(rn) | Rd(fd)); in ucvtf()
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/external/vixl/src/vixl/a64/ |
D | constants-a64.h | 1283 UCVTF = FPIntegerConvertFixed | 0x00030000, enumerator 1284 UCVTF_sw = UCVTF, 1285 UCVTF_sx = UCVTF | SixtyFourBits, 1286 UCVTF_dw = UCVTF | FP64, 1287 UCVTF_dx = UCVTF | SixtyFourBits | FP64,
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D | assembler-a64.cc | 2947 Emit(SF(rn) | FPType(vd) | UCVTF | Rn(rn) | Rd(vd)); in ucvtf()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2359 defm UCVTF : IntegerToFP<1, "ucvtf", uint_to_fp>; 2665 defm UCVTF : SIMDTwoVectorIntToFP<1, 0, 0b11101, "ucvtf", uint_to_fp>; 3110 defm UCVTF : SIMDTwoScalarCVTSD< 1, 0, 0b11101, "ucvtf", AArch64uitof>; 3158 SDPatternOperator loadop, Instruction UCVTF, 3164 (UCVTF (INSERT_SUBREG (DstTy (IMPLICIT_DEF)), 3171 (UCVTF (INSERT_SUBREG (DstTy (IMPLICIT_DEF)), 3200 // UCVTF on floating point registers (both source and destination 4384 defm UCVTF : SIMDScalarRShiftSD<1, 0b11100, "ucvtf">; 4492 defm UCVTF : SIMDVectorRShiftSDToFP<1, 0b11100, "ucvtf",
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D | AArch64SchedCyclone.td | 572 // SCVTF,UCVTF V,V
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/external/vixl/doc/ |
D | supported-instructions.md | 4104 ### UCVTF ### subsection 4111 ### UCVTF ### subsection
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