/external/llvm/lib/Target/AArch64/ |
D | AArch64LoadStoreOptimizer.cpp | 444 BitVector &UsedRegs, in trackRegDefsUses() argument 460 UsedRegs.set(*AI); in trackRegDefsUses() 518 BitVector ModifiedRegs, UsedRegs; in findMatchingInsn() local 520 UsedRegs.resize(TRI->getNumRegs()); in findMatchingInsn() 568 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn() 576 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn() 583 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn() 590 !UsedRegs[MI->getOperand(0).getReg()]) { in findMatchingInsn() 599 !UsedRegs[FirstMI->getOperand(0).getReg()]) { in findMatchingInsn() 626 trackRegDefsUses(MI, ModifiedRegs, UsedRegs, TRI); in findMatchingInsn() [all …]
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/external/llvm/lib/Target/R600/ |
D | SIInsertWaits.cpp | 74 RegCounters UsedRegs; member in __anon851b40b80111::SIInsertWaits 307 UsedRegs[j] = LastIssued; in pushInstruction() 402 increaseCounters(Result, UsedRegs[j]); in handleOperands() 455 memset(&UsedRegs, 0, sizeof(UsedRegs)); in runOnMachineFunction()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | InstrEmitter.cpp | 829 SmallVector<unsigned, 8> UsedRegs; in EmitMachineNode() local 838 UsedRegs.push_back(Reg); in EmitMachineNode() 847 UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg()); in EmitMachineNode() 855 UsedRegs.append(MCID.getImplicitUses(), in EmitMachineNode() 863 UsedRegs.push_back(Reg); in EmitMachineNode() 869 if (!UsedRegs.empty() || II.getImplicitDefs()) in EmitMachineNode() 870 MIB->setPhysRegsDeadExcept(UsedRegs, *TRI); in EmitMachineNode()
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/external/llvm/lib/CodeGen/ |
D | CallingConvLower.cpp | 37 UsedRegs.resize((TRI.getNumRegs()+31)/32); in CCState() 63 UsedRegs[*AI/32] |= 1 << (*AI&31); in MarkAllocated()
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D | MachineBasicBlock.cpp | 740 SmallVector<unsigned, 4> UsedRegs; in SplitCriticalEdge() local 752 if (std::find(UsedRegs.begin(), UsedRegs.end(), Reg) == UsedRegs.end()) in SplitCriticalEdge() 753 UsedRegs.push_back(Reg); in SplitCriticalEdge() 894 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs); in SplitCriticalEdge()
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D | MachineInstr.cpp | 1892 void MachineInstr::setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs, in setPhysRegsDeadExcept() argument 1904 if (std::none_of(UsedRegs.begin(), UsedRegs.end(), in setPhysRegsDeadExcept() 1912 for (ArrayRef<unsigned>::iterator I = UsedRegs.begin(), E = UsedRegs.end(); in setPhysRegsDeadExcept()
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/external/llvm/include/llvm/CodeGen/ |
D | CallingConvLower.h | 203 SmallVector<uint32_t, 16> UsedRegs; variable 277 return UsedRegs[Reg/32] & (1 << (Reg&31)); in isAllocated()
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D | MachineInstr.h | 1065 void setPhysRegsDeadExcept(ArrayRef<unsigned> UsedRegs,
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/external/llvm/lib/Target/ARM/ |
D | ARMFastISel.cpp | 208 bool FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, 2025 bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, in FinishCall() argument 2052 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall() 2053 UsedRegs.push_back(RVLocs[1].getLocReg()); in FinishCall() 2071 UsedRegs.push_back(RVLocs[0].getLocReg()); in FinishCall() 2271 SmallVector<unsigned, 4> UsedRegs; in ARMEmitLibcall() local 2272 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes, false)) return false; in ARMEmitLibcall() 2275 static_cast<MachineInstr *>(MIB)->setPhysRegsDeadExcept(UsedRegs, TRI); in ARMEmitLibcall() 2422 SmallVector<unsigned, 4> UsedRegs; in SelectCall() local 2423 if (!FinishCall(RetVT, UsedRegs, I, CC, NumBytes, isVarArg)) in SelectCall() [all …]
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