Searched refs:VBSL (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/test/CodeGen/AArch64/ |
| D | neon-or-combine.ll | 6 ; (or (and B, A), (and C, ~A)) => (VBSL A, B, C)
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 190 VBSL, enumerator
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| D | ARMScheduleSwift.td | 1576 "VBIT", "VBSL", "VSLI", "VSRI", "VCLS", "VCLZ", "VCNT")>;
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| D | ARMInstrNEON.td | 555 def NEONvbsl : SDNode<"ARMISD::VBSL",
4885 // VBSL : Vector Bitwise Select
4961 // like VBSL but with: "vbif $dst, $src3, $src1", "$src2 = $dst",
4975 // like VBSL but with: "vbit $dst, $src2, $src1", "$src3 = $dst",
7756 // VBIF, VBIT, and VBSL allow, but do not require, a type suffix.
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| D | ARMScheduleA9.td | 2402 // VADD/VAND/VORR/VEOR/VBIC/VORN/VBIT/VBIF/VBSL
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| D | ARMISelLowering.cpp | 1117 case ARMISD::VBSL: return "ARMISD::VBSL"; in getTargetNodeName()
8294 SDValue Result = DAG.getNode(ARMISD::VBSL, dl, CanonicalVT, in PerformORCombine()
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| /external/clang/include/clang/Basic/ |
| D | arm_neon.td | 781 def VBSL : SInst<"vbsl", "dudd",
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| /external/valgrind/none/tests/arm/ |
| D | neon128.stdout.exp | 147 ---- VBSL ----
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| D | neon64.stdout.exp | 193 ---- VBSL ----
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