| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 346 {ISD::VECTOR_SHUFFLE, MVT::v2i32, 1}, in getShuffleCost()
347 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost()
348 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, in getShuffleCost()
349 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost()
351 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2}, in getShuffleCost()
352 {ISD::VECTOR_SHUFFLE, MVT::v4f32, 2}, in getShuffleCost()
353 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 2}, in getShuffleCost()
354 {ISD::VECTOR_SHUFFLE, MVT::v16i8, 2}}; in getShuffleCost()
358 int Idx = CostTableLookup(NEONShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second); in getShuffleCost()
369 {ISD::VECTOR_SHUFFLE, MVT::v2f32, 1}, in getShuffleCost()
[all …]
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| D | ARMISelLowering.cpp | 120 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in addTypeForNEON()
565 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in ARMTargetLowering()
6308 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
9811 case ISD::VECTOR_SHUFFLE: return PerformVECTOR_SHUFFLECombine(N, DCI.DAG); in PerformDAGCombine()
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| /external/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 369 {ISD::VECTOR_SHUFFLE, MVT::v4i64, 1}, // vblendpd in getShuffleCost()
370 {ISD::VECTOR_SHUFFLE, MVT::v4f64, 1}, // vblendpd in getShuffleCost()
372 {ISD::VECTOR_SHUFFLE, MVT::v8i32, 1}, // vblendps in getShuffleCost()
373 {ISD::VECTOR_SHUFFLE, MVT::v8f32, 1}, // vblendps in getShuffleCost()
377 {ISD::VECTOR_SHUFFLE, MVT::v16i16, 5}, in getShuffleCost()
381 {ISD::VECTOR_SHUFFLE, MVT::v32i8, 9} in getShuffleCost()
385 int Idx = CostTableLookup(AVXAltShuffleTbl, ISD::VECTOR_SHUFFLE, LT.second); in getShuffleCost()
392 {ISD::VECTOR_SHUFFLE, MVT::v2i64, 1}, in getShuffleCost()
393 {ISD::VECTOR_SHUFFLE, MVT::v2f64, 1}, in getShuffleCost()
397 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1}, in getShuffleCost()
[all …]
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| D | X86InstrFragmentsSIMD.td | 195 // Specific shuffle nodes - At some point ISD::VECTOR_SHUFFLE will always get
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| D | X86ISelLowering.cpp | 682 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in X86TargetLowering()
789 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4f32, Custom); in X86TargetLowering()
858 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in X86TargetLowering()
881 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Custom); in X86TargetLowering()
882 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Custom); in X86TargetLowering()
1208 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in X86TargetLowering()
1398 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Custom); in X86TargetLowering()
1531 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in X86TargetLowering()
4914 case ISD::VECTOR_SHUFFLE: { in LowerVectorBroadcast()
17191 case ISD::VECTOR_SHUFFLE: return lowerVectorShuffle(Op, Subtarget, DAG); in LowerOperation()
[all …]
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 296 VECTOR_SHUFFLE, enumerator
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| D | SelectionDAGNodes.h | 1313 : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, getSDVTList(VT)), Mask(M) {
1355 return N->getOpcode() == ISD::VECTOR_SHUFFLE;
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| /external/llvm/lib/Target/R600/ |
| D | SIISelLowering.cpp | 65 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i32, Expand); in SITargetLowering()
66 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8f32, Expand); in SITargetLowering()
67 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i32, Expand); in SITargetLowering()
68 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16f32, Expand); in SITargetLowering()
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| D | AMDGPUISelLowering.cpp | 352 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in AMDGPUTargetLowering()
385 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in AMDGPUTargetLowering()
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| /external/llvm/test/CodeGen/ARM/ |
| D | vext.ll | 165 ; this rather than blindly emitting a VECTOR_SHUFFLE (infinite
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 208 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 68 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break; in ScalarizeVectorResult()
606 case ISD::VECTOR_SHUFFLE: in SplitVectorResult()
1738 case ISD::VECTOR_SHUFFLE: in WidenVectorResult()
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| D | DAGCombiner.cpp | 1379 case ISD::VECTOR_SHUFFLE: return visitVECTOR_SHUFFLE(N); in visit()
2635 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG) { in SimplifyBinOpWithSameOpcodeHands()
11009 if (InVec.getOpcode() == ISD::VECTOR_SHUFFLE in visitEXTRACT_VECTOR_ELT()
11359 if (LegalOperations && !TLI.isOperationLegal(ISD::VECTOR_SHUFFLE, VT)) in visitBUILD_VECTOR()
12126 if (BC0.getOpcode() == ISD::VECTOR_SHUFFLE && BC0.hasOneUse()) { in visitVECTOR_SHUFFLE()
12179 if (N1.getOpcode() == ISD::VECTOR_SHUFFLE && in visitVECTOR_SHUFFLE()
12180 N0.getOpcode() != ISD::VECTOR_SHUFFLE && Level < AfterLegalizeDAG && in visitVECTOR_SHUFFLE()
12203 if (N0.getOpcode() == ISD::VECTOR_SHUFFLE && N->isOnlyUserOf(N0.getNode()) && in visitVECTOR_SHUFFLE()
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| D | SelectionDAG.cpp | 548 case ISD::VECTOR_SHUFFLE: { in AddNodeIDCustom()
1613 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops); in getVectorShuffle()
3693 case ISD::VECTOR_SHUFFLE: in getNode()
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| D | LegalizeDAG.cpp | 3146 case ISD::VECTOR_SHUFFLE: { in ExpandNode()
4167 case ISD::VECTOR_SHUFFLE: { in PromoteNode()
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| D | LegalizeIntegerTypes.cpp | 85 case ISD::VECTOR_SHUFFLE: in PromoteIntegerResult()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 1324 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in HexagonTargetLowering()
1354 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v8i8, Custom); in HexagonTargetLowering()
1355 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v4i16, Custom); in HexagonTargetLowering()
2390 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | AMDILISelLowering.cpp | 166 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand); in InitAMDILLowering()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 419 setOperationAction(ISD::VECTOR_SHUFFLE, VT, Promote); in PPCTargetLowering()
420 AddPromotedToType (ISD::VECTOR_SHUFFLE, VT, MVT::v16i8); in PPCTargetLowering()
488 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v16i8, Custom); in PPCTargetLowering()
575 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2f64, Legal); in PPCTargetLowering()
606 setOperationAction(ISD::VECTOR_SHUFFLE, MVT::v2i64, Legal); in PPCTargetLowering()
650 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4f64, Custom); in PPCTargetLowering()
700 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4f32, Custom); in PPCTargetLowering()
742 setOperationAction(ISD::VECTOR_SHUFFLE , MVT::v4i1, Custom); in PPCTargetLowering()
7701 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
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| D | PPCISelDAGToDAG.cpp | 2743 case ISD::VECTOR_SHUFFLE: in Select()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1576 case ShuffleVector: return ISD::VECTOR_SHUFFLE; in InstructionOpcodeToISD()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 274 setOperationAction(ISD::VECTOR_SHUFFLE, Ty, Custom); in addMSAIntType()
378 case ISD::VECTOR_SHUFFLE: return lowerVECTOR_SHUFFLE(Op, DAG); in LowerOperation()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 493 def vector_shuffle : SDNode<"ISD::VECTOR_SHUFFLE", SDTVecShuffle, []>;
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 652 setOperationAction(ISD::VECTOR_SHUFFLE, VT.getSimpleVT(), Custom); in addTypeForNEON()
1984 case ISD::VECTOR_SHUFFLE: in LowerOperation()
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