Searched refs:VG_IS_16_ALIGNED (Results 1 – 8 of 8) sorted by relevance
138 CHECK( VG_IS_16_ALIGNED(0x0) ); in test_VG_IS_XYZ_ALIGNED()139 CHECK( ! VG_IS_16_ALIGNED(0x1) ); in test_VG_IS_XYZ_ALIGNED()140 CHECK( ! VG_IS_16_ALIGNED(0x2) ); in test_VG_IS_XYZ_ALIGNED()141 CHECK( ! VG_IS_16_ALIGNED(0x3) ); in test_VG_IS_XYZ_ALIGNED()142 CHECK( ! VG_IS_16_ALIGNED(0x4) ); in test_VG_IS_XYZ_ALIGNED()143 CHECK( ! VG_IS_16_ALIGNED(0x5) ); in test_VG_IS_XYZ_ALIGNED()144 CHECK( ! VG_IS_16_ALIGNED(0x6) ); in test_VG_IS_XYZ_ALIGNED()145 CHECK( ! VG_IS_16_ALIGNED(0x7) ); in test_VG_IS_XYZ_ALIGNED()146 CHECK( ! VG_IS_16_ALIGNED(0x8) ); in test_VG_IS_XYZ_ALIGNED()147 CHECK( ! VG_IS_16_ALIGNED(0x9) ); in test_VG_IS_XYZ_ALIGNED()[all …]
106 vg_assert(VG_IS_16_ALIGNED(sizeof(struct hacky_sigframe))); in VG_()117 vg_assert(VG_IS_16_ALIGNED(esp+4)); in VG_()196 vg_assert(VG_IS_16_ALIGNED((Addr)frame + 4)); in VG_()
103 vg_assert(VG_IS_16_ALIGNED(sizeof(struct hacky_sigframe))); in VG_()114 vg_assert(VG_IS_16_ALIGNED(rsp+8)); in VG_()196 vg_assert(VG_IS_16_ALIGNED((Addr)frame + 8)); in VG_()
153 vg_assert(VG_IS_16_ALIGNED(sizeof(struct vg_sig_private))); in VG_()154 vg_assert(VG_IS_16_ALIGNED(sizeof(struct rt_sigframe))); in VG_()163 vg_assert(VG_IS_16_ALIGNED(sp)); in VG_()305 vg_assert(VG_IS_16_ALIGNED(sp)); in VG_()
655 vg_assert(VG_IS_16_ALIGNED(sp)); in VG_()850 vg_assert(VG_IS_16_ALIGNED(sp)); in VG_()
746 vg_assert(VG_IS_16_ALIGNED(offsetof(VexGuestX86State,guest_XMM0))); in do_pre_run_checks()761 vg_assert(VG_IS_16_ALIGNED(offsetof(VexGuestAMD64State,guest_YMM0))); in do_pre_run_checks()771 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VSR0)); in do_pre_run_checks()772 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VSR0)); in do_pre_run_checks()773 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VSR0)); in do_pre_run_checks()775 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_VSR1)); in do_pre_run_checks()776 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_VSR1)); in do_pre_run_checks()777 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow2.guest_VSR1)); in do_pre_run_checks()783 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex.guest_D0)); in do_pre_run_checks()784 vg_assert(VG_IS_16_ALIGNED(& tst->arch.vex_shadow1.guest_D0)); in do_pre_run_checks()[all …]
188 #define VG_IS_16_ALIGNED(aaa_p) (0 == (((Addr)(aaa_p)) & ((Addr)0xf))) macro
2334 vg_assert(VG_IS_16_ALIGNED( ((Addr) & VG_(tt_fast)[0]) )); in VG_()