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Searched refs:VLD2DUP (Results 1 – 4 of 4) sorted by relevance

/external/llvm/lib/Target/ARM/
DARMISelLowering.h193 VLD2DUP = ISD::FIRST_TARGET_MEMORY_OPCODE, enumerator
DARMInstrNEON.td1457 // VLD2DUP : Vector Load (single 2-element structure to all lanes)
1458 class VLD2DUP<bits<4> op7_4, string Dt, RegisterOperand VdTy, Operand AddrMode>
1467 def VLD2DUPd8 : VLD2DUP<{0,0,0,?}, "8", VecListDPairAllLanes,
1469 def VLD2DUPd16 : VLD2DUP<{0,1,0,?}, "16", VecListDPairAllLanes,
1471 def VLD2DUPd32 : VLD2DUP<{1,0,0,?}, "32", VecListDPairAllLanes,
1477 def VLD2DUPd8x2 : VLD2DUP<{0,0,1,?}, "8", VecListDPairSpacedAllLanes,
1479 def VLD2DUPd16x2 : VLD2DUP<{0,1,1,?}, "16", VecListDPairSpacedAllLanes,
1481 def VLD2DUPd32x2 : VLD2DUP<{1,0,1,?}, "32", VecListDPairSpacedAllLanes,
DARMISelLowering.cpp1118 case ARMISD::VLD2DUP: return "ARMISD::VLD2DUP"; in getTargetNodeName()
8817 case ARMISD::VLD2DUP: NewOpc = ARMISD::VLD2DUP_UPD; NumVecs = 2; break; in CombineBaseUpdate()
8984 NewOpc = ARMISD::VLD2DUP; in CombineVLDDUP()
9826 case ARMISD::VLD2DUP: in PerformDAGCombine()
DARMISelDAGToDAG.cpp2814 case ARMISD::VLD2DUP: { in Select()