Searched refs:VLD4DUP (Results 1 – 4 of 4) sorted by relevance
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 195 VLD4DUP, enumerator
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| D | ARMInstrNEON.td | 1565 // VLD4DUP : Vector Load (single 4-element structure to all lanes)
1566 class VLD4DUP<bits<4> op7_4, string Dt>
1576 def VLD4DUPd8 : VLD4DUP<{0,0,0,?}, "8">;
1577 def VLD4DUPd16 : VLD4DUP<{0,1,0,?}, "16">;
1578 def VLD4DUPd32 : VLD4DUP<{1,?,0,?}, "32"> { let Inst{6} = Rn{5}; }
1585 def VLD4DUPq8 : VLD4DUP<{0,0,1,?}, "8">;
1586 def VLD4DUPq16 : VLD4DUP<{0,1,1,?}, "16">;
1587 def VLD4DUPq32 : VLD4DUP<{1,?,1,?}, "32"> { let Inst{6} = Rn{5}; }
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| D | ARMISelLowering.cpp | 1120 case ARMISD::VLD4DUP: return "ARMISD::VLD4DUP"; in getTargetNodeName()
8819 case ARMISD::VLD4DUP: NewOpc = ARMISD::VLD4DUP_UPD; NumVecs = 4; break; in CombineBaseUpdate()
8990 NewOpc = ARMISD::VLD4DUP; in CombineVLDDUP()
9828 case ARMISD::VLD4DUP: in PerformDAGCombine()
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| D | ARMISelDAGToDAG.cpp | 2827 case ARMISD::VLD4DUP: { in Select()
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