/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAG.h | 408 SDVTList getVTList(EVT VT1, EVT VT2); 409 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3); 410 SDVTList getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4); 901 SDNode *SelectNodeTo(SDNode *N, unsigned TargetOpc, EVT VT1, EVT VT2); 903 EVT VT2, ArrayRef<SDValue> Ops); 905 EVT VT2, EVT VT3, ArrayRef<SDValue> Ops); 907 EVT VT2, EVT VT3, EVT VT4, ArrayRef<SDValue> Ops); 909 EVT VT2, SDValue Op1); 911 EVT VT2, SDValue Op1, SDValue Op2); 913 EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3); [all …]
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.h | 109 bool isTruncateFree(EVT VT1, EVT VT2) const override; 120 bool isZExtFree(EVT VT1, EVT VT2) const override; 121 bool isZExtFree(SDValue Val, EVT VT2) const override;
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D | MSP430ISelLowering.cpp | 1167 bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() 1168 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 1171 return (VT1.getSizeInBits() > VT2.getSizeInBits()); in isTruncateFree() 1179 bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() 1181 return 0 && VT1 == MVT::i8 && VT2 == MVT::i16; in isZExtFree() 1184 bool MSP430TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 1185 return isZExtFree(Val.getValueType(), VT2); in isZExtFree()
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/external/eigen/unsupported/test/ |
D | FFTW.cpp | 28 template <typename VT1,typename VT2> 29 long double fft_rmse( const VT1 & fftbuf,const VT2 & timebuf) in fft_rmse() 50 template <typename VT1,typename VT2> 51 long double dif_rmse( const VT1 buf1,const VT2 buf2) in dif_rmse()
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/external/llvm/include/llvm/IR/ |
D | LegacyPassNameParser.h | 91 const PassNameParser::OptionInfo *VT2) { in ValLessThan() argument 92 return std::strcmp(VT1->Name, VT2->Name); in ValLessThan()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 1819 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { in CreateStackTemporary() argument 1821 VT2.getStoreSizeInBits())/8; in CreateStackTemporary() 1823 Type *Ty2 = VT2.getTypeForEVT(*getContext()); in CreateStackTemporary() 5287 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { in getVTList() argument 5291 ID.AddInteger(VT2.getRawBits()); in getVTList() 5298 Array[1] = VT2; in getVTList() 5305 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { in getVTList() argument 5309 ID.AddInteger(VT2.getRawBits()); in getVTList() 5317 Array[1] = VT2; in getVTList() 5325 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) { in getVTList() argument [all …]
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/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 742 bool isTruncateFree(EVT VT1, EVT VT2) const override; 755 bool isZExtFree(EVT VT1, EVT VT2) const override; 756 bool isZExtFree(SDValue Val, EVT VT2) const override; 770 bool isNarrowingProfitable(EVT VT1, EVT VT2) const override;
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D | X86ISelLowering.cpp | 17778 bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() 17779 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 17782 unsigned NumBits2 = VT2.getSizeInBits(); in isTruncateFree() 17791 bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() 17793 return VT1 == MVT::i32 && VT2 == MVT::i64 && Subtarget->is64Bit(); in isZExtFree() 17796 bool X86TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 17798 if (isZExtFree(VT1, VT2)) in isZExtFree() 17805 !VT2.isSimple() || !VT2.isInteger()) in isZExtFree() 17843 bool X86TargetLowering::isNarrowingProfitable(EVT VT1, EVT VT2) const { in isNarrowingProfitable() 17845 return !(VT1 == MVT::i32 && VT2 == MVT::i16); in isNarrowingProfitable()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 296 bool isTruncateFree(EVT VT1, EVT VT2) const override; 301 bool isZExtFree(EVT VT1, EVT VT2) const override; 302 bool isZExtFree(SDValue Val, EVT VT2) const override;
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D | AArch64ISelLowering.cpp | 6556 bool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() 6557 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 6560 unsigned NumBits2 = VT2.getSizeInBits(); in isTruncateFree() 6601 bool AArch64TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { in isZExtFree() 6602 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger()) in isZExtFree() 6605 unsigned NumBits2 = VT2.getSizeInBits(); in isZExtFree() 6609 bool AArch64TargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 6611 if (isZExtFree(VT1, VT2)) { in isZExtFree() 6620 VT2.isSimple() && !VT2.isVector() && VT2.isInteger() && in isZExtFree()
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/external/llvm/lib/Target/R600/ |
D | AMDGPUISelLowering.h | 122 bool isZExtFree(SDValue Val, EVT VT2) const override; 124 bool isNarrowingProfitable(EVT VT1, EVT VT2) const override;
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D | AMDGPUISelLowering.cpp | 539 bool AMDGPUTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 540 return isZExtFree(Val.getValueType(), VT2); in isZExtFree()
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/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.h | 100 bool isZExtFree(SDValue Val, EVT VT2) const override;
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D | XCoreISelLowering.cpp | 189 bool XCoreTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 195 !VT2.isSimple() || !VT2.isInteger()) in isZExtFree()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.h | 136 bool isTruncateFree(EVT VT1, EVT VT2) const override;
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D | HexagonISelLowering.cpp | 1865 bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() 1866 if (!VT1.isSimple() || !VT2.isSimple()) { in isTruncateFree() 1869 return ((VT1.getSimpleVT() == MVT::i64) && (VT2.getSimpleVT() == MVT::i32)); in isTruncateFree()
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/external/llvm/include/llvm/Target/ |
D | TargetLowering.h | 779 MVT VT2; in getNumRegisters() local 781 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); in getNumRegisters() 1579 virtual bool isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() argument 1580 return isZExtFree(Val.getValueType(), VT2); in isZExtFree()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 562 bool isTruncateFree(EVT VT1, EVT VT2) const override; 564 bool isZExtFree(SDValue Val, EVT VT2) const override;
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D | PPCISelLowering.cpp | 11119 bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { in isTruncateFree() 11120 if (!VT1.isInteger() || !VT2.isInteger()) in isTruncateFree() 11123 unsigned NumBits2 = VT2.getSizeInBits(); in isTruncateFree() 11127 bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 11144 return TargetLowering::isZExtFree(Val, VT2); in isZExtFree()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 279 bool isZExtFree(SDValue Val, EVT VT2) const override;
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D | ARMISelLowering.cpp | 9937 bool ARMTargetLowering::isZExtFree(SDValue Val, EVT VT2) const { in isZExtFree() 9943 !VT2.isSimple() || !VT2.isInteger()) in isZExtFree()
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/external/llvm/lib/Transforms/Vectorize/ |
D | BBVectorize.cpp | 1035 *VT2 = getVecTypeForPair(IT2, JT2); in areInstsCompatible() local 1078 unsigned VCost = getInstrCost(I->getOpcode(), VT1, VT2, Op1VK, Op2VK); in areInstsCompatible() 1087 VParts2 = TTI->getNumberOfParts(VT2); in areInstsCompatible()
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