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Searched refs:WideVecVT (Results 1 – 2 of 2) sorted by relevance

/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp13874 EVT WideVecVT = in LowerExtendedLoad() local
13878 assert(WideVecVT.getSizeInBits() == LoadUnitVecVT.getSizeInBits() && in LowerExtendedLoad()
13882 assert(TLI.isTypeLegal(WideVecVT) && in LowerExtendedLoad()
13913 SDValue SlicedVec = DAG.getNode(ISD::BITCAST, dl, WideVecVT, Res); in LowerExtendedLoad()
13936 WideVecVT, dl, SlicedVec, DAG.getUNDEF(WideVecVT), &ShuffleVec[0]); in LowerExtendedLoad()
13955 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, dl, SlicedVec, in LowerExtendedLoad()
13956 DAG.getUNDEF(WideVecVT), &ShuffleVec[0]); in LowerExtendedLoad()
22589 EVT WideVecVT = EVT::getVectorVT(*DAG.getContext(), in PerformMLOADCombine() local
22591 assert(WideVecVT.getSizeInBits() == VT.getSizeInBits()); in PerformMLOADCombine()
22594 SDValue WideSrc0 = DAG.getNode(ISD::BITCAST, dl, WideVecVT, Mld->getSrc0()); in PerformMLOADCombine()
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/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp9122 EVT WideVecVT = EVT::getVectorVT(*DAG.getContext(), StVT.getScalarType(), in PerformSTORECombine() local
9124 assert(WideVecVT.getSizeInBits() == VT.getSizeInBits()); in PerformSTORECombine()
9127 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformSTORECombine()
9133 if (!TLI.isTypeLegal(WideVecVT)) return SDValue(); in PerformSTORECombine()
9135 SDValue Shuff = DAG.getVectorShuffle(WideVecVT, DL, WideVec, in PerformSTORECombine()