D | host_arm64_defs.c | 2630 #define X001 BITS4(0, 0,0,1) macro 3085 UInt instr = X_3_8_5_6_5_5(X001, isLoad ? X11000011 : X11000001, in do_load_or_store8() 4584 *p++ = X_3_8_5_6_5_5(X001, X01110101, vM, X110000, vN, vD); in emit_ARM64Instr() 4587 *p++ = X_3_8_5_6_5_5(X001, X01110011, vM, X110000, vN, vD); in emit_ARM64Instr() 4590 *p++ = X_3_8_5_6_5_5(X001, X01110001, vM, X110000, vN, vD); in emit_ARM64Instr() 5007 *p++ = X_3_8_5_6_5_5(X001, X01110001 | (dszBlg2 << 1), in emit_ARM64Instr() 5015 *p++ = X_3_8_5_6_5_5(X001, X01110001 | (dszBlg2 << 1), in emit_ARM64Instr() 5067 = X_3_6_7_6_5_5(X001, X011110, 0, X100101, vN, vD); in emit_ARM64Instr() 5071 = X_3_6_7_6_5_5(X001, X011110, 0, X100001, vN, vD); in emit_ARM64Instr() 5074 = X_3_6_7_6_5_5(X001, X011110, 0, X100111, vN, vD); in emit_ARM64Instr() [all …]
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