Searched refs:X1100 (Results 1 – 2 of 2) sorted by relevance
| /external/valgrind/VEX/priv/ |
| D | host_arm_defs.c | 2725 #define X1100 BITS4(1,1,0,0) macro
2984 case ARMalu_OR: subopc = X1100; break; in emit_ARMInstr()
3593 insn = XXXXXXXX(0xE, X1110,X1011,X0000,dD,X1011,X1100,dM); in emit_ARMInstr()
3599 insn = XXXXXXXX(0xE, X1110,X1011,X0001,dD,X1011,X1100,dM); in emit_ARMInstr()
3680 X1011, X1100, dM); in emit_ARMInstr()
3754 X1100, (regF >> 1) & 0xF, in emit_ARMInstr()
3856 X1100, BITS4(0,Q,M,0), regM); in emit_ARMInstr()
4352 X1100, BITS4(N,0,M,0), regM); in emit_ARMInstr()
4356 X1100, BITS4(N,0,M,0), regM); in emit_ARMInstr()
4869 #undef X1100
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| /external/guava/guava-tests/benchmark/com/google/common/base/ |
| D | EnumsBenchmark.java | 157 X1098, X1099, X1100, X1101, X1102, X1103, X1104, X1105, X1106, X1107, X1108, X1109, X1110, enumConstant
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