/external/mesa3d/src/mesa/x86/ |
D | sse_normal.S | 77 MOVSS ( M(5), XMM2 ) /* m5 */ 78 UNPCKLPS( XMM2, XMM1 ) /* m5 | m0 */ 86 MOVLPS ( S(0), XMM2 ) /* uy | ux */ 87 MULPS ( XMM1, XMM2 ) /* uy*m5*scale | ux*m0*scale */ 88 MOVLPS ( XMM2, D(0) ) /* ->D(1) | D(0) */ 90 MOVSS ( S(2), XMM2 ) /* uz */ 91 MULSS ( XMM0, XMM2 ) /* uz*m10*scale */ 92 MOVSS ( XMM2, D(2) ) /* ->D(2) */ 147 MOVSS ( M(5), XMM2 ) /* m5 */ 148 UNPCKLPS( XMM2, XMM1 ) /* m5 | m1 */ [all …]
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D | sse_xform1.S | 82 MOVSS( S(0), XMM2 ) /* ox */ 83 SHUFPS( CONST(0x0), XMM2, XMM2 ) /* ox | ox | ox | ox */ 84 MULPS( XMM0, XMM2 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */ 85 ADDPS( XMM1, XMM2 ) /* + | + | + | + */ 86 MOVUPS( XMM2, D(0) ) 188 MOVSS( M(13), XMM2 ) /* m13 */ 198 MOVSS( XMM2, D(1) ) 249 MOVSS( M(14), XMM2 ) /* m14 */ 256 MOVSS( XMM2, D(2) ) /* m14->D(2) */ 310 MOVSS( S(0), XMM2 ) /* ox */ [all …]
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D | sse_xform3.S | 79 MOVAPS ( REGOFF(32, EDX), XMM2 ) /* m8 | m9 | m10 | m11 */ 94 MULPS ( XMM2, XMM6 ) /* m11*oz | m10*oz | m9*oz | m8*oz */ 205 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */ 206 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */ 207 MOVLPS ( M(12), XMM2 ) /* - | - | m13 | m12 */ 216 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */ 270 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */ 271 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */ 272 MOVLPS ( M(8), XMM2 ) /* - | - | m9 | m8 */ 283 MULPS ( XMM2, XMM5 ) /* oz*m9 | oz*m8 */ [all …]
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D | sse_xform2.S | 78 MOVAPS( M(12), XMM2 ) /* m15 | m14 | m13 | m12 */ 90 ADDPS( XMM2, XMM3 ) 193 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */ 194 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */ 195 MOVLPS ( M(12), XMM2 ) /* - | - | m13 | m12 */ 202 ADDPS ( XMM2, XMM0 ) /* - | - | +m13 | +m12 */ 252 MOVSS ( M(5), XMM2 ) /* - | - | - | m5 */ 253 UNPCKLPS ( XMM2, XMM1 ) /* - | - | m5 | m0 */ 312 MOVLPS( M(12), XMM2 ) /* m13 | m12 */ 325 ADDPS( XMM2, XMM3 ) [all …]
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D | sse_xform4.S | 86 MOVSS( SRC(2), XMM2 ) /* oz */ 87 SHUFPS( CONST(0x0), XMM2, XMM2 ) /* oz | oz | oz | oz */ 88 MULPS( XMM6, XMM2 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */ 95 ADDPS( XMM2, XMM0 ) /* ox*m3+oy*m7+oz*m11 | ... */ 145 MOVAPS( MAT(8), XMM2 ) /* m11 | m10 | m9 | m8 */ 160 MULPS( XMM2, XMM6 ) /* oz*m11 | oz*m10 | oz*m9 | oz*m8 */
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D | assyntax.h | 226 #define XMM2 %xmm2 macro
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/external/llvm/lib/Target/X86/ |
D | X86CallingConv.td | 42 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3 46 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 76 CCIfType<[f32, f64], CCAssignToReg<[XMM0,XMM1,XMM2]>>>>, 87 CCIfType<[f32], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>, 88 CCIfType<[f64], CCIfSubtarget<"hasSSE2()", CCAssignToReg<[XMM0,XMM1,XMM2]>>>, 103 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 131 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 264 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>, 327 [XMM0, XMM1, XMM2, XMM3]>>, 333 [XMM1, XMM2, XMM3]>>>>, [all …]
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D | README-SSE.txt | 187 %XMM2 = MOVAPSrr %XMM0 188 SHUFPSrr %XMM2<def&use>, %XMM2, 0
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D | X86RegisterInfo.td | 174 def XMM2: X86Reg<"xmm2", 2>, DwarfRegNum<[19, 23, 23]>;
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D | X86FastISel.cpp | 2747 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerArguments() 3041 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, in fastLowerCall()
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D | X86InstrCompiler.td | 419 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, 439 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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/external/llvm/test/CodeGen/X86/ |
D | stackmap-liveness.ll | 47 ; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2 94 ; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2 126 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2 163 ; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2
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D | break-false-dep.ll | 78 ; SSE: xorps [[XMM2:%xmm[0-9]+]] 79 ; SSE: , [[XMM2]] 80 ; SSE: cvtsi2ssl %{{.*}}, [[XMM2]]
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D | ghc-cc64.ll | 17 @f2 = external global float ; assigned to register: XMM2
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/external/llvm/test/TableGen/ |
D | cast.td | 48 def XMM2: Register<"xmm2">; 64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | Slice.td | 42 def XMM2: Register<"xmm2">; 58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | TargetInstrSpec.td | 49 def XMM2: Register<"xmm2">; 65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | MultiPat.td | 52 def XMM2: Register<"xmm2">; 68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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/external/llvm/test/MC/X86/ |
D | intel-syntax-encoding.s | 65 cmpltps XMM2, XMM1
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D | intel-syntax.s | 73 vshufpd XMM0, XMM1, XMM2, 1
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/external/llvm/lib/Target/X86/Disassembler/ |
D | X86DisassemblerDecoder.h | 219 ENTRY(XMM2) \
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/external/valgrind/memcheck/ |
D | mc_machine.c | 716 if (o >= GOF(XMM2) && o+sz <= GOF(XMM2)+SZB(XMM2)) return GOF(XMM2); in get_otrack_shadow_offset_wrk()
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/external/llvm/docs/TableGen/ |
D | index.rst | 69 XMM0, XMM1, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5,
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D | LangIntro.rst | 544 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in {
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/external/libvpx/libvpx/vp8/common/x86/ |
D | loopfilter_sse2.asm | 699 movdqa [rsp+_t0], xmm2 ; save to free XMM2
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