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Searched refs:addImm (Results 1 – 25 of 119) sorted by relevance

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/external/llvm/lib/Target/R600/
DR600ControlFlowFinalizer.cpp338 .addImm(0) // ADDR in MakeFetchClause()
339 .addImm(AluInstCount - 1); // COUNT in MakeFetchClause()
378 .addImm(LiteralPair0) in insertLiterals()
379 .addImm(LiteralPair1); in insertLiterals()
423 .addImm(literal0) in MakeALUClause()
424 .addImm(literal2); in MakeALUClause()
439 .addImm(CfCount); in EmitFetchClause()
453 .addImm(CfCount); in EmitALUClause()
520 .addImm(CfCount + 1) in runOnMachineFunction()
521 .addImm(1); in runOnMachineFunction()
[all …]
DR600ISelLowering.cpp285 .addImm(EOP); // Set End of program bit in EmitInstrWithCustomInserter()
329 .addImm(SrcX) in EmitInstrWithCustomInserter()
330 .addImm(SrcY) in EmitInstrWithCustomInserter()
331 .addImm(SrcZ) in EmitInstrWithCustomInserter()
332 .addImm(SrcW) in EmitInstrWithCustomInserter()
333 .addImm(0) in EmitInstrWithCustomInserter()
334 .addImm(0) in EmitInstrWithCustomInserter()
335 .addImm(0) in EmitInstrWithCustomInserter()
336 .addImm(0) in EmitInstrWithCustomInserter()
337 .addImm(1) in EmitInstrWithCustomInserter()
[all …]
DR600EmitClauseMarkers.cpp281 .addImm(Address++) // ADDR in MakeALUClause()
282 .addImm(KCacheBanks.empty()?0:KCacheBanks[0].first) // KB0 in MakeALUClause()
283 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].first) // KB1 in MakeALUClause()
284 .addImm(KCacheBanks.empty()?0:2) // KM0 in MakeALUClause()
285 .addImm((KCacheBanks.size() < 2)?0:2) // KM1 in MakeALUClause()
286 .addImm(KCacheBanks.empty()?0:KCacheBanks[0].second) // KLINE0 in MakeALUClause()
287 .addImm((KCacheBanks.size() < 2)?0:KCacheBanks[1].second) // KLINE1 in MakeALUClause()
288 .addImm(AluInstCount) // COUNT in MakeALUClause()
289 .addImm(1); // Enabled in MakeALUClause()
DSIInstrInfo.cpp351 .addImm(0) in copyPhysReg()
606 .addImm(SI::KernelInputOffsets::NGROUPS_Z); in calculateLDSSpillAddress()
609 .addImm(SI::KernelInputOffsets::NGROUPS_Y); in calculateLDSSpillAddress()
632 .addImm(-1) in calculateLDSSpillAddress()
633 .addImm(0); in calculateLDSSpillAddress()
637 .addImm(-1) in calculateLDSSpillAddress()
643 .addImm(2) in calculateLDSSpillAddress()
651 .addImm(LDSOffset) in calculateLDSSpillAddress()
667 .addImm(Arg); in insertNOPs()
691 .addImm(0) in expandPostRAPseudo()
[all …]
DSILowerControlFlow.cpp161 .addImm(3) in SkipIfDead()
166 .addImm(0) in SkipIfDead()
167 .addImm(0x09) // V_008DFC_SQ_EXP_NULL in SkipIfDead()
168 .addImm(0) in SkipIfDead()
169 .addImm(1) in SkipIfDead()
170 .addImm(1) in SkipIfDead()
315 .addImm(0); in Kill()
319 .addImm(0) in Kill()
376 .addImm(-7) in LoadM0()
558 .addImm(StackOffset); in runOnMachineFunction()
[all …]
DSILowerI1Copies.cpp124 .addImm(Val); in runOnMachineFunction()
132 .addImm(0) in runOnMachineFunction()
133 .addImm(-1) in runOnMachineFunction()
141 .addImm(0); in runOnMachineFunction()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h94 return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0).addReg(0); in addDirectMem()
100 return MIB.addImm(1).addReg(0).addImm(Offset).addReg(0); in addOffset()
118 return MIB.addReg(Reg1, getKillRegState(isKill1)).addImm(1) in addRegReg()
119 .addReg(Reg2, getKillRegState(isKill2)).addImm(0).addReg(0); in addRegReg()
134 MIB.addImm(AM.Scale).addReg(AM.IndexReg); in addFullAddress()
138 MIB.addImm(AM.Disp); in addFullAddress()
178 return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0) in addConstantPoolReference()
DX86FrameLowering.cpp240 .addImm(Offset); in emitSPUpdate()
280 .addImm(ThisVal); in emitSPUpdate()
647 .addImm(-TailCallReturnAddrDelta) in emitPrologue()
712 .addImm(FramePtr) in emitPrologue()
765 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag( in emitPrologue()
780 .addImm(Val) in emitPrologue()
825 .addImm(NumBytes) in emitPrologue()
829 .addImm(NumBytes) in emitPrologue()
833 .addImm(NumBytes) in emitPrologue()
840 .addImm(isEAXAlive ? NumBytes - 4 : NumBytes) in emitPrologue()
[all …]
/external/mesa3d/src/gallium/drivers/radeon/
DSIISelLowering.cpp89 .addImm(0) // ABS in EmitInstrWithCustomInserter()
90 .addImm(1) // CLAMP in EmitInstrWithCustomInserter()
91 .addImm(0) // OMOD in EmitInstrWithCustomInserter()
92 .addImm(0); // NEG in EmitInstrWithCustomInserter()
104 .addImm(1) // ABS in EmitInstrWithCustomInserter()
105 .addImm(0) // CLAMP in EmitInstrWithCustomInserter()
106 .addImm(0) // OMOD in EmitInstrWithCustomInserter()
107 .addImm(0); // NEG in EmitInstrWithCustomInserter()
119 .addImm(0) // ABS in EmitInstrWithCustomInserter()
120 .addImm(0) // CLAMP in EmitInstrWithCustomInserter()
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZAsmPrinter.cpp35 .addImm(MI->getOperand(1).getImm()); in lowerRILow()
40 .addImm(MI->getOperand(2).getImm()); in lowerRILow()
49 .addImm(MI->getOperand(1).getImm()); in lowerRIHigh()
54 .addImm(MI->getOperand(2).getImm()); in lowerRIHigh()
64 .addImm(MI->getOperand(3).getImm()) in lowerRIEfLow()
65 .addImm(MI->getOperand(4).getImm()) in lowerRIEfLow()
66 .addImm(MI->getOperand(5).getImm()); in lowerRIEfLow()
135 .addImm(MI->getOperand(2).getImm()); in EmitInstruction()
141 .addImm(MI->getOperand(2).getImm()); in EmitInstruction()
191 .addImm(14).addReg(SystemZ::R0D); in EmitInstruction()
[all …]
DSystemZInstrInfo.cpp185 .addImm(32 - Size).addImm(128 + 31).addImm(Rotate); in emitGRX32Move()
388 .addImm(CCValid).addImm(CCMask).addMBB(TBB); in InsertBranch()
544 .addImm(CCValid).addImm(CCMask) in PredicateInstruction()
742 .addImm(Start).addImm(End + 128).addImm(0); in convertToThreeAddress()
763 .addFrameIndex(FrameIndex).addImm(0) in foldMemoryOperandImpl()
764 .addImm(MI->getOperand(2).getImm()); in foldMemoryOperandImpl()
784 .addFrameIndex(FrameIndex).addImm(0) in foldMemoryOperandImpl()
785 .addImm(MI->getOperand(2).getImm()); in foldMemoryOperandImpl()
797 .addImm(0).addReg(0); in foldMemoryOperandImpl()
805 .addFrameIndex(FrameIndex).addImm(0).addReg(0); in foldMemoryOperandImpl()
[all …]
/external/llvm/lib/Target/ARM/
DARMAsmPrinter.cpp137 .addImm(ARMCC::AL) in runOnMachineFunction()
1014 .addImm(ARMCC::AL) in EmitJump2Table()
1224 .addImm(MI->getOperand(2).getImm()) in EmitInstruction()
1241 .addImm(MI->getOperand(3).getImm()) in EmitInstruction()
1252 .addImm(ARMCC::AL) in EmitInstruction()
1288 .addImm(ARMCC::AL).addReg(0) in EmitInstruction()
1297 .addImm(ARMCC::AL) in EmitInstruction()
1306 .addImm(ARMCC::AL) in EmitInstruction()
1317 .addImm(ARMCC::AL) in EmitInstruction()
1330 .addImm(ARMCC::AL) in EmitInstruction()
[all …]
DARMFrameLowering.cpp251 .addImm(~AlignMask)); in emitAligningInstructions()
256 .addImm(AlignMask))); in emitAligningInstructions()
265 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsr, NrBitsToZero)))); in emitAligningInstructions()
269 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, NrBitsToZero)))); in emitAligningInstructions()
277 .addImm(~AlignMask)); in emitAligningInstructions()
441 .addImm(NumWords) in emitPrologue()
445 .addImm(NumWords) in emitPrologue()
454 .addImm((unsigned)ARMCC::AL).addReg(0) in emitPrologue()
466 .addImm((unsigned)ARMCC::AL).addReg(0) in emitPrologue()
669 .addImm((unsigned)ARMCC::AL).addReg(0).addReg(0); in emitPrologue()
[all …]
DThumb2InstrInfo.cpp145 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in storeRegToStackSlot()
159 MIB.addFrameIndex(FI).addImm(0).addMemOperand(MMO); in storeRegToStackSlot()
186 .addFrameIndex(FI).addImm(0).addMemOperand(MMO)); in loadRegFromStackSlot()
200 MIB.addFrameIndex(FI).addImm(0).addMemOperand(MMO); in loadRegFromStackSlot()
228 .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags); in emitT2RegPlusImmediate()
244 .addImm(NumBytes) in emitT2RegPlusImmediate()
245 .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags); in emitT2RegPlusImmediate()
251 .addImm(NumBytes >> 16) in emitT2RegPlusImmediate()
252 .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags); in emitT2RegPlusImmediate()
261 .addImm((unsigned)Pred).addReg(PredReg).addReg(0) in emitT2RegPlusImmediate()
[all …]
DARMExpandPseudoInsts.cpp566 MIB.addImm(Lane); in ExpandLaneOp()
680 LO16 = LO16.addImm(SOImmValV1); in ExpandMOV32BitImm()
681 HI16 = HI16.addImm(SOImmValV2); in ExpandMOV32BitImm()
684 LO16.addImm(Pred).addReg(PredReg).addReg(0); in ExpandMOV32BitImm()
685 HI16.addImm(Pred).addReg(PredReg).addReg(0); in ExpandMOV32BitImm()
711 LO16 = LO16.addImm(Lo16); in ExpandMOV32BitImm()
712 HI16 = HI16.addImm(Hi16); in ExpandMOV32BitImm()
733 LO16.addImm(Pred).addReg(PredReg); in ExpandMOV32BitImm()
734 HI16.addImm(Pred).addReg(PredReg); in ExpandMOV32BitImm()
756 .addImm(MI.getOperand(3).getImm()) // 'pred' in ExpandMI()
[all …]
DARMLoadStoreOptimizer.cpp450 .addReg(Base, getKillRegState(false)).addImm(WordOffset * 4) in UpdateBaseRegUses()
451 .addImm(Pred).addReg(PredReg); in UpdateBaseRegUses()
469 .addReg(Base, getKillRegState(false)).addImm(WordOffset * 4) in UpdateBaseRegUses()
470 .addImm(Pred).addReg(PredReg); in UpdateBaseRegUses()
590 .addImm(Pred).addReg(PredReg); in MergeOps()
599 .addReg(Base, getKillRegState(BaseKill)).addImm(Offset/4) in MergeOps()
600 .addImm(Pred).addReg(PredReg); in MergeOps()
603 .addReg(Base, getKillRegState(BaseKill)).addImm(Offset) in MergeOps()
604 .addImm(Pred).addReg(PredReg); in MergeOps()
607 .addReg(Base, getKillRegState(BaseKill)).addImm(Offset) in MergeOps()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCBranchSelector.cpp198 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2); in runOnMachineFunction()
201 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2); in runOnMachineFunction()
204 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2); in runOnMachineFunction()
206 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2); in runOnMachineFunction()
208 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2); in runOnMachineFunction()
210 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2); in runOnMachineFunction()
212 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2); in runOnMachineFunction()
DPPCFrameLowering.cpp354 .addImm(UsedRegMask); in HandleVRSaveUpdate()
358 .addImm(UsedRegMask); in HandleVRSaveUpdate()
363 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
367 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
372 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
376 .addImm(UsedRegMask >> 16); in HandleVRSaveUpdate()
380 .addImm(UsedRegMask & 0xFFFF); in HandleVRSaveUpdate()
708 .addImm(FPOffset) in emitPrologue()
715 .addImm(PBPOffset) in emitPrologue()
722 .addImm(BPOffset) in emitPrologue()
[all …]
DPPCRegisterInfo.cpp359 .addImm(FrameSize); in lowerDynamicAlloc()
362 .addImm(0) in lowerDynamicAlloc()
366 .addImm(0) in lowerDynamicAlloc()
383 .addImm(~(MaxAlign-1)); in lowerDynamicAlloc()
399 .addImm(maxCallFrameSize); in lowerDynamicAlloc()
408 .addImm(~(MaxAlign-1)); in lowerDynamicAlloc()
424 .addImm(maxCallFrameSize); in lowerDynamicAlloc()
471 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling()
472 .addImm(0) in lowerCRSpilling()
473 .addImm(31); in lowerCRSpilling()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp102 .addImm(Encoding); in tryOrrMovk()
112 .addImm(Imm16) in tryOrrMovk()
113 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryOrrMovk()
169 .addImm(Encoding); in tryToreplicateChunks()
190 .addImm(Imm16) in tryToreplicateChunks()
191 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryToreplicateChunks()
214 .addImm(Imm16) in tryToreplicateChunks()
215 .addImm(AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt)); in tryToreplicateChunks()
352 .addImm(Encoding); in trySequenceOfOnes()
364 .addImm(getChunk(UImm, FirstMovkIdx)) in trySequenceOfOnes()
[all …]
/external/llvm/lib/Target/Sparc/
DSparcInstrInfo.cpp206 .addMBB(UnCondBrIter->getOperand(0).getMBB()).addImm(BranchCode); in AnalyzeBranch()
248 BuildMI(&MBB, DL, get(SP::BCOND)).addMBB(TBB).addImm(CC); in InsertBranch()
250 BuildMI(&MBB, DL, get(SP::FBCOND)).addMBB(TBB).addImm(CC); in InsertBranch()
367 BuildMI(MBB, I, DL, get(SP::STXri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
370 BuildMI(MBB, I, DL, get(SP::STri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
373 BuildMI(MBB, I, DL, get(SP::STFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
376 BuildMI(MBB, I, DL, get(SP::STDFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
381 BuildMI(MBB, I, DL, get(SP::STQFri)).addFrameIndex(FI).addImm(0) in storeRegToStackSlot()
404 BuildMI(MBB, I, DL, get(SP::LDXri), DestReg).addFrameIndex(FI).addImm(0) in loadRegFromStackSlot()
407 BuildMI(MBB, I, DL, get(SP::LDri), DestReg).addFrameIndex(FI).addImm(0) in loadRegFromStackSlot()
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonExpandPredSpillCode.cpp255 HEXAGON_RESERVED_REG_1).addImm(Offset); in runOnMachineFunction()
264 .addImm(0).addReg(HEXAGON_RESERVED_REG_2); in runOnMachineFunction()
267 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset); in runOnMachineFunction()
273 .addImm(0) in runOnMachineFunction()
281 addReg(FP).addImm(Offset).addReg(HEXAGON_RESERVED_REG_2); in runOnMachineFunction()
299 HEXAGON_RESERVED_REG_1).addImm(Offset); in runOnMachineFunction()
307 .addImm(0); in runOnMachineFunction()
312 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset); in runOnMachineFunction()
316 .addImm(0); in runOnMachineFunction()
322 HEXAGON_RESERVED_REG_2).addReg(FP).addImm(Offset); in runOnMachineFunction()
DHexagonCopyToCombine.cpp566 .addImm(LoOperand.getImm()); in emitCombineII()
571 .addImm(HiOperand.getImm()) in emitCombineII()
581 .addImm(HiOperand.getImm()) in emitCombineII()
582 .addImm(LoOperand.getImm()); in emitCombineII()
589 .addImm(HiOperand.getImm()) in emitCombineII()
590 .addImm(LoOperand.getImm()); in emitCombineII()
597 .addImm(HiOperand.getImm()) in emitCombineII()
598 .addImm(LoOperand.getImm()); in emitCombineII()
622 .addImm(HiOperand.getImm()) in emitCombineIR()
649 .addImm(LoOperand.getImm()); in emitCombineRI()
/external/llvm/lib/Target/Mips/
DMipsLongBranch.cpp297 .addReg(Mips::SP).addImm(-8); in expandToLongBranch()
299 .addReg(Mips::SP).addImm(0); in expandToLongBranch()
331 .addReg(Mips::SP).addImm(0); in expandToLongBranch()
337 .addReg(Mips::SP).addImm(8)); in expandToLongBranch()
341 .addReg(Mips::SP).addImm(8); in expandToLongBranch()
384 .addReg(Mips::SP_64).addImm(-16); in expandToLongBranch()
386 .addReg(Mips::SP_64).addImm(0); in expandToLongBranch()
391 .addReg(Mips::AT_64).addImm(16); in expandToLongBranch()
406 .addReg(Mips::SP_64).addImm(0); in expandToLongBranch()
411 .addReg(Mips::SP_64).addImm(16)); in expandToLongBranch()
DMips16InstrInfo.cpp107 addFrameIndex(FI).addImm(Offset) in storeRegToStack()
125 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(Offset) in loadRegFromStack()
212 MIB.addImm(FrameSize); in makeFrame()
217 MIB.addImm(Base); in makeFrame()
254 MIB.addImm(FrameSize); in restoreFrame()
275 MIB1.addImm(Amount).addImm(-1); in adjustStackPtrBig()
386 BuildMI(MBB, II, DL, get(Mips::LwConstant32), Reg).addImm(Imm).addImm(-1); in loadImmediate()
450 BuildMI(MBB, I, DL, AddiuSpImm(Imm)).addImm(Imm); in BuildAddiuSpImm()

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