/external/llvm/lib/Target/R600/ |
D | SIPrepareScratchRegs.cpp | 82 Entry->addLiveIn(ScratchPtrPreloadReg); in runOnMachineFunction() 85 Entry->addLiveIn(ScratchOffsetPreloadReg); in runOnMachineFunction() 123 MBB.addLiveIn(ScratchOffsetReg); in runOnMachineFunction() 182 MBB.addLiveIn(ScratchOffsetReg); in runOnMachineFunction()
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D | SIMachineFunctionInfo.cpp | 62 BI->addLiveIn(LaneVGPR); in getSpilledReg()
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D | SIISelLowering.cpp | 494 MF.addLiveIn(InputPtrReg, &AMDGPU::SReg_64RegClass); in LowerFormalArguments() 495 MF.addLiveIn(ScratchPtrReg, &AMDGPU::SReg_64RegClass); in LowerFormalArguments() 548 Reg = MF.addLiveIn(Reg, &AMDGPU::SReg_64RegClass); in LowerFormalArguments() 555 Reg = MF.addLiveIn(Reg, RC); in LowerFormalArguments() 568 Reg = MF.addLiveIn(Reg, RC); in LowerFormalArguments()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonFrameLowering.cpp | 261 MBB.addLiveIn(SuperReg); in spillCalleeSavedRegisters() 269 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 315 MBB.addLiveIn(SuperReg); in restoreCalleeSavedRegisters() 322 MBB.addLiveIn(Reg); in restoreCalleeSavedRegisters()
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D | HexagonCFGOptimizer.cpp | 220 LayoutSucc->addLiveIn(NewLiveIn[i]); in runOnMachineFunction()
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | SIAssignInterpRegs.cpp | 128 MRI.addLiveIn(physReg, virtReg); in AddLiveIn() 129 MF->front().addLiveIn(physReg); in AddLiveIn()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelDAGToDAG.cpp | 144 MF.getRegInfo().addLiveIn(Mips::T9_64); in initGlobalBaseReg() 145 MBB.addLiveIn(Mips::T9_64); in initGlobalBaseReg() 172 MF.getRegInfo().addLiveIn(Mips::T9); in initGlobalBaseReg() 173 MBB.addLiveIn(Mips::T9); in initGlobalBaseReg() 207 MF.getRegInfo().addLiveIn(Mips::V0); in initGlobalBaseReg() 208 MBB.addLiveIn(Mips::V0); in initGlobalBaseReg()
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D | Mips16FrameLowering.cpp | 126 EntryBlock->addLiveIn(Reg); in spillCalleeSavedRegisters()
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D | MipsSEFrameLowering.cpp | 482 MBB.addLiveIn(ehDataReg(I)); in emitPrologue() 586 EntryBlock->addLiveIn(Reg); in spillCalleeSavedRegisters()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430FrameLowering.cpp | 77 I->addLiveIn(MSP430::FP); in emitPrologue() 199 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZFrameLowering.cpp | 119 MBB.addLiveIn(GPR64); in addSavedGPR() 203 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 378 I->addLiveIn(SystemZ::R11D); in emitPrologue()
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/external/llvm/lib/Target/ARM/ |
D | ARMFrameLowering.cpp | 970 MBB.addLiveIn(Reg); in emitPushInst() 1175 MBB.addLiveIn(SupReg); in emitAlignedDPRCS2Spills() 1193 MBB.addLiveIn(SupReg); in emitAlignedDPRCS2Spills() 1205 MBB.addLiveIn(SupReg); in emitAlignedDPRCS2Spills() 1214 MBB.addLiveIn(NextReg); in emitAlignedDPRCS2Spills() 1908 AllocMBB->addLiveIn(*i); in adjustForSegmentedStacks() 1909 GetMBB->addLiveIn(*i); in adjustForSegmentedStacks() 1910 McrMBB->addLiveIn(*i); in adjustForSegmentedStacks() 1911 PrevStackMBB->addLiveIn(*i); in adjustForSegmentedStacks() 1912 PostStackMBB->addLiveIn(*i); in adjustForSegmentedStacks()
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/external/llvm/lib/CodeGen/ |
D | MachineRegisterInfo.cpp | 388 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies() 392 EntryMBB->addLiveIn(LiveIns[i].first); in EmitLiveInCopies()
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D | VirtRegMap.cpp | 268 LiveIn[i]->addLiveIn(SubReg); in addMBBLiveIns() 281 LiveIn[i]->addLiveIn(PhysReg); in addMBBLiveIns()
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D | CallingConvLower.cpp | 245 unsigned VReg = MF.addLiveIn(PReg, RC); in analyzeMustTailForwardedRegisters()
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D | MachineBasicBlock.cpp | 343 MachineBasicBlock::addLiveIn(unsigned PhysReg, const TargetRegisterClass *RC) { in addLiveIn() function in MachineBasicBlock 370 addLiveIn(PhysReg); in addLiveIn() 815 NMBB->addLiveIn(*I); in SplitCriticalEdge()
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D | MachineFunction.cpp | 435 unsigned MachineFunction::addLiveIn(unsigned PReg, in addLiveIn() function in MachineFunction 453 MRI.addLiveIn(PReg, VReg); in addLiveIn()
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D | BranchFolding.cpp | 400 NewMBB->addLiveIn(i); in MaintainLiveIns() 1863 TBB->addLiveIn(Def); in HoistCommonCodeInSuccs() 1864 FBB->addLiveIn(Def); in HoistCommonCodeInSuccs()
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/external/llvm/lib/Target/X86/ |
D | X86FrameLowering.cpp | 737 I->addLiveIn(MachineFramePtr); in emitPrologue() 1448 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 1461 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters() 1639 allocMBB->addLiveIn(*i); in adjustForSegmentedStacks() 1640 checkMBB->addLiveIn(*i); in adjustForSegmentedStacks() 1644 allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D); in adjustForSegmentedStacks() 1919 stackCheckMBB->addLiveIn(*I); in adjustForHiPEPrologue() 1920 incStackMBB->addLiveIn(*I); in adjustForHiPEPrologue()
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/external/llvm/lib/Target/XCore/ |
D | XCoreFrameLowering.cpp | 262 MBB.addLiveIn(XCore::LR); in emitPrologue() 287 MBB.addLiveIn(SpillList[i].Reg); in emitPrologue() 431 MBB.addLiveIn(Reg); in spillCalleeSavedRegisters()
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/external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
D | LivenessAnalyzer.java | 219 blockN.addLiveIn(regV); in liveInAtStatement()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineBasicBlock.h | 320 void addLiveIn(unsigned Reg) { LiveIns.push_back(Reg); } 325 unsigned addLiveIn(unsigned PhysReg, const TargetRegisterClass *RC);
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D | MachineFunction.h | 328 unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC);
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/external/llvm/lib/Target/Sparc/ |
D | SparcFrameLowering.cpp | 239 MBB->addLiveIn(reg - SP::I0 + SP::O0); in remapRegsForLeafProc()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64FrameLowering.cpp | 790 MBB.addLiveIn(Reg1); in spillCalleeSavedRegisters() 791 MBB.addLiveIn(Reg2); in spillCalleeSavedRegisters()
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