Searched refs:addRegMask (Results 1 – 10 of 10) sorted by relevance
153 const MachineInstrBuilder &addRegMask(const uint32_t *Mask) const { in addRegMask() function
393 MIB.addRegMask(RM->getRegMask()); in AddOperand()
1170 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
2268 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in ARMEmitLibcall()2419 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in SelectCall()
6590 MIB.addRegMask(RI.getNoPreservedMask()); in EmitSjLjDispatchBlock()
1552 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
8150 MIB.addRegMask(TRI->getNoPreservedMask()); in emitEHSjLjSetJmp()
3108 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()
18671 .addRegMask(RegMask) in EmitLoweredSegAlloca()18679 .addRegMask(RegMask) in EmitLoweredSegAlloca()18688 .addRegMask(RegMask) in EmitLoweredSegAlloca()18761 MIB.addReg(X86::RAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()18772 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()18783 MIB.addReg(X86::EAX, RegState::ImplicitDefine).addRegMask(RegMask); in EmitLoweredTLSCall()18903 MIB.addRegMask(RegInfo->getNoPreservedMask()); in emitEHSjLjSetJmp()
3167 MIB.addRegMask(TRI.getCallPreservedMask(*FuncInfo.MF, CC)); in fastLowerCall()