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Searched refs:add_D1 (Results 1 – 1 of 1) sorted by relevance

/external/valgrind/coregrind/
Dm_cache.c92 #define add_D1(size, assoc, linesize) add_dcache(1, size, assoc, linesize) macro
174 case 0x0a: add_D1( 8, 2, 32); break; in Intel_cache_info()
175 case 0x0c: add_D1(16, 4, 32); break; in Intel_cache_info()
176 case 0x0d: add_D1(16, 4, 64); break; in Intel_cache_info()
177 case 0x0e: add_D1(24, 6, 64); break; in Intel_cache_info()
178 case 0x2c: add_D1(32, 8, 64); break; in Intel_cache_info()
245 case 0x60: add_D1(16, 8, 64); break; /* sectored */ in Intel_cache_info()
246 case 0x66: add_D1( 8, 4, 64); break; /* sectored */ in Intel_cache_info()
247 case 0x67: add_D1(16, 4, 64); break; /* sectored */ in Intel_cache_info()
248 case 0x68: add_D1(32, 4, 64); break; /* sectored */ in Intel_cache_info()
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