/external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
D | valid-xfail-mips32r6.txt | 10 0x20 0xc0 0x00 0x40 # CHECK: beqc $6, $zero, 256 11 0x20 0xa0 0x00 0x40 # CHECK: beqc $5, $zero, 256 12 0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
|
D | valid-mips32r6.txt | 20 0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
|
D | valid-mips32r6-el.txt | 20 0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 256
|
/external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
D | valid-xfail-mips64r6.txt | 10 0x20 0xc0 0x00 0x40 # CHECK: beqc $6, $zero, 256 11 0x20 0xa0 0x00 0x40 # CHECK: beqc $5, $zero, 256 12 0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
|
D | valid-mips64r6-el.txt | 20 0x40 0x00 0xa6 0x20 # CHECK: beqc $5, $6, 256
|
D | valid-mips64r6.txt | 20 0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
|
/external/llvm/test/MC/Mips/mips64r6/ |
D | relocations.s | 11 # CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A] 66 beqc $5, $6, bar
|
/external/llvm/test/MC/Mips/mips32r6/ |
D | relocations.s | 11 # CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A] 61 beqc $5, $6, bar
|
/external/v8/src/mips/ |
D | assembler-mips.h | 702 void beqc(Register rs, Register rt, int16_t offset); 703 void beqc(Register rs, Register rt, Label* L) { in beqc() function 704 beqc(rs, rt, branch_offset_compact(L, false)>>2); in beqc()
|
D | assembler-mips.cc | 1363 void Assembler::beqc(Register rs, Register rt, int16_t offset) { in beqc() function in v8::internal::Assembler
|
/external/v8/src/mips64/ |
D | assembler-mips64.h | 694 void beqc(Register rs, Register rt, int16_t offset); 695 void beqc(Register rs, Register rt, Label* L) { in beqc() function 696 beqc(rs, rt, branch_offset_compact(L, false)>>2); in beqc()
|
D | assembler-mips64.cc | 1342 void Assembler::beqc(Register rs, Register rt, int16_t offset) { in beqc() function in v8::internal::Assembler
|
/external/llvm/test/MC/Disassembler/Mips/ |
D | mips32r6.txt | 26 0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
|
D | mips64r6.txt | 26 0x20 0xa6 0x00 0x40 # CHECK: beqc $5, $6, 256
|
/external/llvm/lib/Target/Mips/ |
D | Mips32r6InstrInfo.td | 337 class BEQC_DESC : CMP_BC_DESC_BASE<"beqc", brtarget, GPR32Opnd>;
|