| /external/llvm/test/MC/Mips/mips64r6/ |
| D | relocations.s | 20 # CHECK-FIXUP: bnezc $9, bar # encoding: [0xf9,0b001AAAAA,A,A]
69 bnezc $9, bar
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | relocations.s | 20 # CHECK-FIXUP: bnezc $9, bar # encoding: [0xf9,0b001AAAAA,A,A]
64 bnezc $9, bar
|
| /external/llvm/test/CodeGen/Mips/ |
| D | micromips-compact-branches.ll | 19 ; CHECK: bnezc
|
| /external/v8/test/cctest/ |
| D | test-disasm-mips.cc | 228 COMPARE(bnezc(a0, 0), in TEST()
230 COMPARE(bnezc(a0, 0xfffff), // 0x0fffff == 1048575. in TEST()
232 COMPARE(bnezc(a0, 0x100000), // 0x100000 == -1048576. in TEST()
|
| D | test-disasm-mips64.cc | 309 COMPARE(bnezc(a0, 0), in TEST()
311 COMPARE(bnezc(a0, 0xfffff), // 0x0fffff == 1048575. in TEST()
313 COMPARE(bnezc(a0, 0x100000), // 0x100000 == -1048576. in TEST()
|
| /external/v8/src/mips/ |
| D | assembler-mips.h | 718 void bnezc(Register rt, int32_t offset);
719 void bnezc(Register rt, Label* L) { in bnezc() function
720 bnezc(rt, branch_offset21_compact(L, false)>>2); in bnezc()
|
| D | assembler-mips.cc | 1385 void Assembler::bnezc(Register rs, int32_t offset) { in bnezc() function in v8::internal::Assembler
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 710 void bnezc(Register rt, int32_t offset);
711 void bnezc(Register rt, Label* L) { in bnezc() function
712 bnezc(rt, branch_offset21_compact(L, false)>>2); in bnezc()
|
| D | assembler-mips64.cc | 1364 void Assembler::bnezc(Register rs, int32_t offset) { in bnezc() function in v8::internal::Assembler
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | micromips.txt | 352 # CHECK: bnezc $9, 1332
|
| D | micromips_le.txt | 352 # CHECK: bnezc $9, 1332
|
| D | mips32r6.txt | 36 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256
|
| D | mips64r6.txt | 36 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6.txt | 28 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256
|
| D | valid-mips32r6-el.txt | 28 0x90 0x46 0xa0 0xf8 # CHECK: bnezc $5, 72256
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 28 0x90 0x46 0xa0 0xf8 # CHECK: bnezc $5, 72256
|
| D | valid-mips64r6.txt | 28 0xf8 0xa0 0x46 0x90 # CHECK: bnezc $5, 72256
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 350 class BNEZC_DESC : CMP_CBR_EQNE_Z_DESC_BASE<"bnezc", brtarget21, GPR32Opnd>;
|
| D | MicroMipsInstrInfo.td | 621 def BNEZC_MM : CompactBranchMM<"bnezc", brtarget_mm, setne, GPR32Opnd>,
|