| /external/llvm/test/MC/ARM/ |
| D | neon-vld-vst-align.s | 5 vld1.8 {d0}, [r4]
6 vld1.8 {d0}, [r4:16]
7 vld1.8 {d0}, [r4:32]
8 vld1.8 {d0}, [r4:64]
9 vld1.8 {d0}, [r4:128]
10 vld1.8 {d0}, [r4:256]
12 @ CHECK: vld1.8 {d0}, [r4] @ encoding: [0x24,0xf9,0x0f,0x07]
14 @ CHECK-ERRORS: vld1.8 {d0}, [r4:16]
17 @ CHECK-ERRORS: vld1.8 {d0}, [r4:32]
19 @ CHECK: vld1.8 {d0}, [r4:64] @ encoding: [0x24,0xf9,0x1f,0x07]
[all …]
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| D | vfp-aliases.s | 8 fstmfdd sp!, {d0}
9 fstmead sp!, {d0}
10 fstmdbd sp!, {d0}
11 fstmiad sp!, {d0}
21 fldmiad sp!, {d0}
22 fldmdbd sp!, {d0}
23 fldmead sp!, {d0}
24 fldmfdd sp!, {d0}
26 fstmeax sp!, {d0}
27 fldmfdx sp!, {d0}
[all …]
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| D | directive-arch_extension-fp.s | 35 vselgt.f64 d0, d0, d0
37 vselge.f64 d0, d0, d0
39 vseleq.f64 d0, d0, d0
41 vselvs.f64 d0, d0, d0
43 vmaxnm.f64 d0, d0, d0
45 vminnm.f64 d0, d0, d0
48 vcvtb.f64.f16 d0, s0
50 vcvtb.f16.f64 s0, d0
52 vcvtt.f64.f16 d0, s0
54 vcvtt.f16.f64 s0, d0
[all …]
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| D | directive-arch_extension-simd.s | 24 vmaxnm.f64 d0, d0, d0
26 vminnm.f64 d0, d0, d0
33 vcvta.s32.f64 s0, d0
35 vcvta.u32.f64 s0, d0
41 vcvtn.s32.f64 s0, d0
43 vcvtn.u32.f64 s0, d0
49 vcvtp.s32.f64 s0, d0
51 vcvtp.u32.f64 s0, d0
57 vcvtm.s32.f64 s0, d0
59 vcvtm.u32.f64 s0, d0
[all …]
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| D | vfp-aliases-diagnostics.s | 13 fstmfds sp!, {d0}
14 fstmeas sp!, {d0}
15 fstmdbs sp!, {d0}
16 fstmias sp!, {d0}
18 fldmias sp!, {d0}
19 fldmdbs sp!, {d0}
20 fldmeas sp!, {d0}
21 fldmfds sp!, {d0}
47 @ CHECK: fstmfds sp!, {d0}
50 @ CHECK: fstmeas sp!, {d0}
[all …]
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| /external/valgrind/none/tests/arm/ |
| D | neon64.c | 642 TESTINSN_imm("vmov.i32 d0", d0, 0x7); in main()
652 TESTINSN_imm("vmov.f32 d0", d0, 0.328125); in main()
653 TESTINSN_imm("vmov.f32 d0", d0, -0.328125); in main()
657 TESTINSN_imm("vmvn.i32 d0", d0, 0x7); in main()
670 TESTINSN_imm("vorr.i32 d0", d0, 0x7); in main()
679 TESTINSN_imm("vbic.i32 d0", d0, 0x7); in main()
688 TESTINSN_un("vmvn d0, d1", d0, d1, i32, 24); in main()
690 TESTINSN_un("vmvn d0, d14", d0, d14, i32, 24); in main()
694 TESTINSN_un("vmov d0, d1", d0, d1, i32, 24); in main()
696 TESTINSN_un("vmov d0, d14", d0, d14, i32, 24); in main()
[all …]
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| /external/libavc/common/arm/ |
| D | ih264_inter_pred_luma_horz_hpel_vert_qpel_a9q.s | 152 vext.8 d5, d0, d1, #5
153 vaddl.u8 q3, d0, d5
155 vext.8 d2, d0, d1, #2
156 vext.8 d3, d0, d1, #3
158 vext.8 d4, d0, d1, #4
160 vext.8 d1, d0, d1, #1
164 vext.8 d5, d0, d1, #5
165 vaddl.u8 q4, d0, d5
166 vext.8 d2, d0, d1, #2
167 vext.8 d3, d0, d1, #3
[all …]
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| D | ih264_intra_pred_luma_16x16_a9q.s | 282 vadd.u16 d0, d0, d1
283 vpaddl.u16 d0, d0
284 vpaddl.u32 d0, d0
285 vqrshrun.s16 d0, q0, #5
286 vdup.u8 q0, d0[0]
296 vadd.u16 d0, d0, d1
297 vpaddl.u16 d0, d0
298 vpaddl.u32 d0, d0
299 vqrshrun.s16 d0, q0, #4
300 vdup.u8 q0, d0[0]
[all …]
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| /external/libmpeg2/common/arm/ |
| D | impeg2_mem_func.s | 103 vdup.8 d0, r1 @//r1 is the 8-bit value to be set into
105 vst1.8 {d0}, [r0], r2 @//Store the row 1
106 vst1.8 {d0}, [r0], r2 @//Store the row 2
107 vst1.8 {d0}, [r0], r2 @//Store the row 3
108 vst1.8 {d0}, [r0], r2 @//Store the row 4
109 vst1.8 {d0}, [r0], r2 @//Store the row 5
110 vst1.8 {d0}, [r0], r2 @//Store the row 6
111 vst1.8 {d0}, [r0], r2 @//Store the row 7
112 vst1.8 {d0}, [r0], r2 @//Store the row 8
155 vst1.16 {d0, d1} , [r0]! @row1
[all …]
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| D | impeg2_inter_pred.s | 109 vld1.8 {d0, d1}, [r4], r2 @Load and increment src
110 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
113 vld1.8 {d0, d1}, [r4], r2 @Load and increment src
114 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
115 vld1.8 {d0, d1}, [r4], r2 @Load and increment src
116 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
117 vld1.8 {d0, d1}, [r4], r2 @Load and increment src
118 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
119 vld1.8 {d0, d1}, [r4], r2 @Load and increment src
120 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
[all …]
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| D | impeg2_idct.s | 127 vld1.8 d0, [r2], r1
156 vaddw.u8 q4, q15, d0
159 vqmovun.s16 d0, q4
163 vst1.8 d0, [r3], r6
427 vld1.16 {d0, d1}, [r14] @//D0,D1 are used for storing the constant data
442 vmull.s16 q10, d2, d0[0] @// y0 * cos4(part of c0 and c1)
447 vmull.s16 q12, d6, d0[1] @// y1 * cos1(part of b0)
449 vmull.s16 q13, d6, d0[3] @// y1 * cos3(part of b1)
455 vmlal.s16 q12, d7, d0[3] @// y1 * cos1 + y3 * cos3(part of b0)
459 vmlsl.s16 q14, d7, d0[1] @// y1 * sin3 - y3 * cos1(part of b2)
[all …]
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| /external/libavc/encoder/arm/ |
| D | ih264e_half_pel.s | 88 vmov.i8 d0, #5
145 vmlsl.u8 q4, d31, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row0)
147 vmlsl.u8 q5, d30, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 (column2,row0)
149 vmlsl.u8 q6, d29, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 (column3,row0)
151 vmlsl.u8 q7, d28, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row1)
154 vmlsl.u8 q8, d27, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 (column2,row1)
156 vmlsl.u8 q9, d26, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 (column3,row1)
158 vmlsl.u8 q4, d31, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column1,row0)
160 vmlsl.u8 q5, d30, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column2,row0)
162 vmlsl.u8 q6, d29, d0 @// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (column3,row0)
[all …]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | neont-VLD-reencoding.txt | 12 # CHECK: vld1.8 {d0[0]}, [r0], r0 @ encoding: [0xa0,0xf9,0x00,0x00]
13 # CHECK: vld1.8 {d0[1]}, [r0], r0 @ encoding: [0xa0,0xf9,0x20,0x00]
14 # CHECK: vld1.8 {d0[2]}, [r0], r0 @ encoding: [0xa0,0xf9,0x40,0x00]
15 # CHECK: vld1.8 {d0[3]}, [r0], r0 @ encoding: [0xa0,0xf9,0x60,0x00]
16 # CHECK: vld1.8 {d0[4]}, [r0], r0 @ encoding: [0xa0,0xf9,0x80,0x00]
17 # CHECK: vld1.8 {d0[5]}, [r0], r0 @ encoding: [0xa0,0xf9,0xa0,0x00]
18 # CHECK: vld1.8 {d0[6]}, [r0], r0 @ encoding: [0xa0,0xf9,0xc0,0x00]
19 # CHECK: vld1.8 {d0[7]}, [r0], r0 @ encoding: [0xa0,0xf9,0xe0,0x00]
30 # CHECK: vld1.16 {d0[0]}, [r0], r0 @ encoding: [0xa0,0xf9,0x00,0x04]
31 # CHECK: vld1.16 {d0[0]}, [r0:16], r0 @ encoding: [0xa0,0xf9,0x10,0x04]
[all …]
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| /external/libhevc/common/arm/ |
| D | ihevc_intra_pred_luma_horz.s | 148 vdup.8 q1,d0[7]
152 vdup.8 q2,d0[6]
156 vdup.8 q3,d0[5]
160 vdup.8 q4,d0[4]
164 vdup.8 q1,d0[3]
168 vdup.8 q2,d0[2]
172 vdup.8 q3,d0[1]
177 vdup.8 q4,d0[0]
224 vdup.8 q8,d0[7]
236 vdup.8 q1,d0[6]
[all …]
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| D | ihevc_itrans_recon_16x16.s | 147 vld1.16 {d0,d1,d2,d3},[r14] @//d0,d1 are used for storing the constant data
205 @d0[0]= 64 d2[0]=64
206 @d0[1]= 90 d2[1]=57
207 @d0[2]= 89 d2[2]=50
208 @d0[3]= 87 d2[3]=43
242 vmull.s16 q12,d6,d0[1] @// y1 * cos1(part of b0)
243 vmull.s16 q13,d6,d0[3] @// y1 * cos3(part of b1)
247 vmlal.s16 q12,d7,d0[3] @// y1 * cos1 + y3 * cos3(part of b0)
257 vmull.s16 q6,d10,d0[0]
258 vmlal.s16 q6,d11,d0[2]
[all …]
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| D | ihevc_itrans_recon_8x8.s | 172 vld1.16 {d0,d1},[r14] @//d0,d1 are used for storing the constant data
187 vmull.s16 q10,d2,d0[0] @// y0 * cos4(part of c0 and c1)
192 vmull.s16 q12,d6,d0[1] @// y1 * cos1(part of b0)
194 vmull.s16 q13,d6,d0[3] @// y1 * cos3(part of b1)
200 vmlal.s16 q12,d7,d0[3] @// y1 * cos1 + y3 * cos3(part of b0)
204 vmlsl.s16 q14,d7,d0[1] @// y1 * sin3 - y3 * cos1(part of b2)
208 vmull.s16 q11,d10,d0[0] @// y4 * cos4(part of c0 and c1)
210 vmull.s16 q3,d3,d0[2] @// y2 * cos2(part of d0)
235 vmlsl.s16 q13,d14,d0[1] @// y1 * cos3 - y3 * sin1 - y5 * cos1(part of b1)
237 vmlal.s16 q15,d14,d0[3] @// y1 * sin1 - y3 * sin3 + y5 * cos3(part of b3)
[all …]
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| D | ihevc_intra_pred_chroma_horz.s | 134 vdup.16 q1,d0[3]
138 vdup.16 q2,d0[2]
142 vdup.16 q3,d0[1]
146 vdup.16 q4,d0[0]
215 vdup.16 q4,d0[3]
220 vdup.16 q5,d0[2]
223 vdup.16 q6,d0[1]
226 vdup.16 q7,d0[0]
229 vdup.16 q8,d0[3]
241 @vdup.8 q1,d0[2]
[all …]
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| D | ihevc_intra_pred_filters_luma_mode_11_to_17.s | 187 vld1.8 d0,[r1]
195 vrev64.8 d0,d0
197 vst1.8 d0,[r6]!
207 vld1.8 d0,[r1]
211 vrev64.8 d0,d0
214 vst1.8 d0,[r6]!
220 vld1.8 d0,[r1]
221 vrev64.8 d0,d0
222 vst1.8 d0,[r6]!
293 …vld1.8 {d0,d1}, [r6] @stores the 32 values reqd based on indices values (from l…
[all …]
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| D | ihevc_mem_fns.s | 85 VLD1.8 d0,[r1]!
86 VST1.8 d0,[r0]!
114 VLD1.8 d0,[r1]!
115 VST1.8 d0,[r0]!
154 VDUP.8 d0,r1
157 VST1.8 d0,[r0]!
183 VDUP.8 d0,r1
186 VST1.8 d0,[r0]!
226 VDUP.16 d0,r1
228 VST1.16 d0,[r0]!
[all …]
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| /external/libvpx/libvpx/vp8/common/arm/neon/ |
| D | vp8_subpixelvariance16x16_neon.asm | 60 vdup.8 d0, d31[0] ;first_pass filter (d0 d1)
71 vmull.u8 q7, d2, d0 ;(src_ptr[0] * Filter[0])
72 vmull.u8 q8, d3, d0
73 vmull.u8 q9, d5, d0
74 vmull.u8 q10, d6, d0
75 vmull.u8 q11, d8, d0
76 vmull.u8 q12, d9, d0
77 vmull.u8 q13, d11, d0
78 vmull.u8 q14, d12, d0
124 vmull.u8 q9, d2, d0 ;(src_ptr[0] * Filter[0])
[all …]
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| D | vp8_subpixelvariance8x8_neon.asm | 45 vdup.8 d0, d31[0] ;first_pass filter (d0 d1)
50 vmull.u8 q6, d2, d0 ;(src_ptr[0] * Filter[0])
51 vmull.u8 q7, d4, d0
52 vmull.u8 q8, d6, d0
53 vmull.u8 q9, d8, d0
77 vmull.u8 q6, d2, d0 ;(src_ptr[0] * Filter[0])
78 vmull.u8 q7, d4, d0
79 vmull.u8 q8, d6, d0
80 vmull.u8 q9, d8, d0
81 vmull.u8 q10, d10, d0
[all …]
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| D | sad_neon.c | 18 uint8x8_t d0, d8; in vp8_sad8x8_neon() local
25 d0 = vld1_u8(src_ptr); in vp8_sad8x8_neon()
29 q12 = vabdl_u8(d0, d8); in vp8_sad8x8_neon()
32 d0 = vld1_u8(src_ptr); in vp8_sad8x8_neon()
36 q12 = vabal_u8(q12, d0, d8); in vp8_sad8x8_neon()
52 uint8x8_t d0, d8; in vp8_sad8x16_neon() local
59 d0 = vld1_u8(src_ptr); in vp8_sad8x16_neon()
63 q12 = vabdl_u8(d0, d8); in vp8_sad8x16_neon()
66 d0 = vld1_u8(src_ptr); in vp8_sad8x16_neon()
70 q12 = vabal_u8(q12, d0, d8); in vp8_sad8x16_neon()
[all …]
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| /external/libpng/arm/ |
| D | filter_neon.S | 63 vadd.u8 d0, d3, d4
64 vadd.u8 d1, d0, d5
67 vst4.32 {d0[0],d1[0],d2[0],d3[0]},[r1,:128]!
83 vadd.u8 d0, d3, d22
85 vadd.u8 d1, d0, d5
88 vst1.32 {d0[0]}, [r1,:32], r2
119 vhadd.u8 d0, d3, d16
120 vadd.u8 d0, d0, d4
121 vhadd.u8 d1, d0, d17
127 vst4.32 {d0[0],d1[0],d2[0],d3[0]},[r1,:128]!
[all …]
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| /external/libvpx/libvpx/vp9/common/arm/neon/ |
| D | vp9_reconintra_neon.asm | 38 vld1.32 {d0[0]}, [r2]
39 vst1.32 {d0[0]}, [r0], r1
40 vst1.32 {d0[0]}, [r0], r1
41 vst1.32 {d0[0]}, [r0], r1
42 vst1.32 {d0[0]}, [r0], r1
55 vld1.8 {d0}, [r2]
56 vst1.8 {d0}, [r0], r1
57 vst1.8 {d0}, [r0], r1
58 vst1.8 {d0}, [r0], r1
59 vst1.8 {d0}, [r0], r1
[all …]
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| /external/libvpx/libvpx/vp8/encoder/arm/neon/ |
| D | vp8_shortwalsh4x4_neon.asm | 25 vld1.16 {d0}, [r0@64], r2 ; load input
31 ;transpose d0, d1, d2, d3. Then, d0=ip[0], d1=ip[1], d2=ip[2], d3=ip[3]
32 vtrn.32 d0, d2
37 vtrn.16 d0, d1
40 vadd.s16 d4, d0, d2 ; ip[0] + ip[2]
43 vsub.s16 d7, d0, d2 ; ip[0] - ip[2]
51 vadd.s16 d0, d4, d5 ; a1 + d1
56 vsub.s16 d0, d0, d16 ; op[0] = a1 + d1 + (a1 != 0)
59 ;transpose d0, d1, d2, d3, Then, d0=ip[0], d1=ip[4], d2=ip[8], d3=ip[12]
61 vtrn.32 d0, d2
[all …]
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