Searched refs:dmultu (Results 1 – 25 of 39) sorted by relevance
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/external/valgrind/none/tests/mips64/ |
D | arithmetic_instruction.stdout.exp-mips64r2 | 10985 dmultu $t0, $t1 :: rs 0x0, rt 0xffffffffb1f740b4, HI 0x0, LO 0x0 10986 dmultu $v0, $v1 :: rs 0x12bd6aa, rt 0xa2a6ec661ba84121, HI 0xbe8159, LO 0xa7b8a47115b7d5ea 10987 dmultu $t0, $t1 :: rs 0x0, rt 0xffffffffb5365d03, HI 0x0, LO 0x0 10988 dmultu $v0, $v1 :: rs 0x7e876382d2ab13, rt 0x614d9b445f12236b, HI 0x3017a82b446008, LO 0xe93183d28f… 10989 dmultu $t0, $t1 :: rs 0x9823b6e, rt 0xffffffffb8757bda, HI 0x9823b6d, LO 0xfd57bc67e4ba75ac 10990 dmultu $v0, $v1 :: rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75, HI 0x234b21d396c67a36, LO 0xe923a4… 10991 dmultu $t0, $t1 :: rs 0xd4326d9, rt 0xffffffffbcb4666d, HI 0xd4326d8, LO 0xfc83823413a60065 10992 dmultu $v0, $v1 :: rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666, HI 0x4a9079d1e2804943, LO 0x218872… 10993 dmultu $t0, $t1 :: rs 0x130476dc, rt 0xffffffffa2f33668, HI 0x130476db, LO 0xf9166da2b5b6b160 10994 dmultu $v0, $v1 :: rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17, HI 0x172a574aa8a55dea, LO 0x228b27… [all …]
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D | arithmetic_instruction.stdout.exp-mips64 | 10985 dmultu $t0, $t1 :: rs 0x0, rt 0xffffffffb1f740b4, HI 0x0, LO 0x0 10986 dmultu $v0, $v1 :: rs 0x12bd6aa, rt 0xa2a6ec661ba84121, HI 0xbe8159, LO 0xa7b8a47115b7d5ea 10987 dmultu $t0, $t1 :: rs 0x0, rt 0xffffffffb5365d03, HI 0x0, LO 0x0 10988 dmultu $v0, $v1 :: rs 0x7e876382d2ab13, rt 0x614d9b445f12236b, HI 0x3017a82b446008, LO 0xe93183d28f… 10989 dmultu $t0, $t1 :: rs 0x9823b6e, rt 0xffffffffb8757bda, HI 0x9823b6d, LO 0xfd57bc67e4ba75ac 10990 dmultu $v0, $v1 :: rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75, HI 0x234b21d396c67a36, LO 0xe923a4… 10991 dmultu $t0, $t1 :: rs 0xd4326d9, rt 0xffffffffbcb4666d, HI 0xd4326d8, LO 0xfc83823413a60065 10992 dmultu $v0, $v1 :: rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666, HI 0x4a9079d1e2804943, LO 0x218872… 10993 dmultu $t0, $t1 :: rs 0x130476dc, rt 0xffffffffa2f33668, HI 0x130476db, LO 0xf9166da2b5b6b160 10994 dmultu $v0, $v1 :: rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17, HI 0x172a574aa8a55dea, LO 0x228b27… [all …]
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/external/llvm/test/MC/Disassembler/Mips/ |
D | mips64_le.txt | 23 # CHECK: dmultu $23, $13
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D | mips64r2_le.txt | 23 # CHECK: dmultu $23, $13
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D | mips64r2.txt | 23 # CHECK: dmultu $23, $13
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D | mips64.txt | 26 # CHECK: dmultu $23, $13
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/external/v8/test/cctest/ |
D | test-disasm-mips64.cc | 141 COMPARE(dmultu(a0, a1), in TEST() 145 COMPARE(dmultu(a6, a7), in TEST() 149 COMPARE(dmultu(v0, v1), in TEST()
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/external/llvm/test/MC/Mips/mips64r6/ |
D | invalid-mips3.s | 13 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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D | invalid-mips64.s | 17 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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/external/llvm/test/MC/Mips/mips2/ |
D | invalid-mips3.s | 24 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
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D | invalid-mips5.s | 24 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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D | invalid-mips4.s | 25 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | mul.ll | 201 ; GP64-NOT-R6: dmultu $5, $7
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/external/llvm/test/MC/Mips/mips1/ |
D | invalid-mips3.s | 28 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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D | invalid-mips4.s | 27 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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D | invalid-mips5.s | 26 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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/external/llvm/test/MC/Mips/mips3/ |
D | valid.s | 79 dmultu $a1,$a2
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 83 dmultu $a1,$a2
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 83 dmultu $a1,$a2
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 88 dmultu $a1,$a2
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/external/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 90 dmultu $a1,$a2
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/external/llvm/test/MC/Mips/mips64r5/ |
D | valid.s | 90 dmultu $a1,$a2
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/external/llvm/test/MC/Mips/mips64r2/ |
D | valid.s | 90 dmultu $a1,$a2
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/external/llvm/test/MC/Disassembler/Mips/mips3/ |
D | valid-mips3.txt | 72 0x00 0xa6 0x00 0x1d # CHECK: dmultu $5, $6
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D | valid-mips3-el.txt | 72 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
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