| /external/valgrind/none/tests/mips64/ |
| D | rotate_swap.stdout.exp-mips64r2 | 44 drotrv :: in 0x2000ffffffffffff, out 0xffff2000ffffffff, SA 16
45 drotrv :: in 0xffff0000ffffffff, out 0xffffffff0000ffff, SA 16
46 drotrv :: in 0x2000ffffffffffff, out 0xff2000ffffffffff, SA 8
47 drotrv :: in 0x2000ffffffffffff, out 0xf2000fffffffffff, SA 4
48 drotrv :: in 0x2000ffffffffffff, out 0xf90007ffffffffff, SA 5
49 drotrv :: in 0x31415927ffffffff, out 0xffcc505649ffffff, SA 10
50 drotrv :: in 0x2000ffffffffffff, out 0xf2000fffffffffff, SA 4
51 drotrv :: in 0x2000ffffffffffff, out 0x2000ffffffffffff, SA 0
52 drotrv :: in 0xeeeeffffffffffff, out 0xffffeeeeffffffff, SA 16
53 drotrv :: in 0x2000ffffffffffff, out 0xfffffffe4001ffff, SA 31
[all …]
|
| D | shift_instructions.stdout.exp-mips64r2 | 4097 drotrv $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb1f740b4
4098 drotrv $s0, $s1, $s2 :: rd 0x95eb5500000000, rs 0x12bd6aa, rt 0xa2a6ec661ba84121
4099 drotrv $t0, $t1, $t2 :: rd 0x0, rs 0x0, rt 0xffffffffb5365d03
4100 drotrv $s0, $s1, $s2 :: rd 0xec705a5562600fd0, rs 0x7e876382d2ab13, rt 0x614d9b445f12236b
4101 drotrv $t0, $t1, $t2 :: rd 0x608edb8000000002, rs 0x9823b6e, rt 0xffffffffb8757bda
4102 drotrv $s0, $s1, $s2 :: rd 0x6b74d618a8879cbb, rs 0x976d6e9ac31510f3, rt 0x3baa99471f6d4d75
4103 drotrv $t0, $t1, $t2 :: rd 0x6a1936c80000, rs 0xd4326d9, rt 0xffffffffbcb4666d
4104 drotrv $s0, $s1, $s2 :: rd 0xdd6b5a97eeddd1b5, rs 0xb7746d775ad6a5fb, rt 0x680cce5fb236b666
4105 drotrv $t0, $t1, $t2 :: rd 0x130476dc000000, rs 0x130476dc, rt 0xffffffffa2f33668
4106 drotrv $s0, $s1, $s2 :: rd 0xef6a04856181450c, rs 0x42b0c0a28677b502, rt 0x58ec644d6481af17
[all …]
|
| /external/llvm/test/CodeGen/Mips/ |
| D | mips64shift.ll | 68 ; CHECK: drotrv
78 ; CHECK: drotrv
|
| /external/v8/test/cctest/ |
| D | test-disasm-mips64.cc | 518 COMPARE(drotrv(a0, a1, a2), in TEST()
520 COMPARE(drotrv(s0, s1, s2), in TEST()
522 COMPARE(drotrv(a6, a7, t0), in TEST()
524 COMPARE(drotrv(v0, v1, fp), in TEST()
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips64r2_le.txt | 89 # CHECK: drotrv $24, $23, $5
|
| D | mips64r2.txt | 89 # CHECK: drotrv $24, $23, $5
|
| /external/llvm/test/MC/Mips/mips64/ |
| D | invalid-mips64r2.s | 13 …drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips5/ |
| D | invalid-mips64r2.s | 18 …drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| D | valid.s | 95 …drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x…
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| D | valid.s | 95 …drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x…
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| D | valid.s | 95 …drotrv $1,$14,$15 # CHECK: drotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x…
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| D | valid-mips64r5-el.txt | 124 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
|
| D | valid-mips64r5.txt | 124 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-mips64r2-el.txt | 127 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
|
| D | valid-mips64r2.txt | 127 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-mips64r3.txt | 124 0x01 0xee 0x08 0x56 # CHECK: drotrv $1, $14, $15
|
| D | valid-mips64r3-el.txt | 124 0x56 0x08 0xee 0x01 # CHECK: drotrv $1, $14, $15
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 168 def DROTRV : shift_rotate_reg<"drotrv", GPR64Opnd, II_DROTRV, rotr>,
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 808 void drotrv(Register rd, Register rt, Register rs);
|
| D | assembler-mips64.cc | 1747 void Assembler::drotrv(Register rd, Register rt, Register rs) { in drotrv() function in v8::internal::Assembler
|
| D | macro-assembler-mips64.cc | 1033 drotrv(rd, rs, rt.rm()); in Dror()
|