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/external/valgrind/none/tests/mips64/
Dshift_instructions.stdout.exp-mips642049 dsll32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
2050 dsll32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
2051 dsll32 $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
2052 dsll32 $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
2053 dsll32 $t0, $t1, 0x00 :: rt 0x12bd6aa00000000, rs 0x12bd6aa, imm 0x0000
2054 dsll32 $t2, $t3, 0x1f :: rt 0x0, rs 0x12bd6aa, imm 0x001f
2055 dsll32 $a0, $a1, 0x0f :: rt 0xeb55000000000000, rs 0x12bd6aa, imm 0x000f
2056 dsll32 $s0, $s1, 0x03 :: rt 0x95eb55000000000, rs 0x12bd6aa, imm 0x0003
2057 dsll32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
2058 dsll32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
[all …]
Dshift_instructions.stdout.exp-mips64r26657 dsll32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
6658 dsll32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
6659 dsll32 $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
6660 dsll32 $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
6661 dsll32 $t0, $t1, 0x00 :: rt 0x12bd6aa00000000, rs 0x12bd6aa, imm 0x0000
6662 dsll32 $t2, $t3, 0x1f :: rt 0x0, rs 0x12bd6aa, imm 0x001f
6663 dsll32 $a0, $a1, 0x0f :: rt 0xeb55000000000000, rs 0x12bd6aa, imm 0x000f
6664 dsll32 $s0, $s1, 0x03 :: rt 0x95eb55000000000, rs 0x12bd6aa, imm 0x0003
6665 dsll32 $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
6666 dsll32 $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
[all …]
/external/llvm/test/MC/Mips/mips3/
Dvalid.s83 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
84 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/
Dsext_64_32.ll13 ; CHECK: dsll32 ${{[a-z0-9]+}}, ${{[a-z0-9]+}}, 0
Dmips64shift.ll30 ; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 8
/external/llvm/test/MC/Mips/mips4/
Dvalid.s87 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
88 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/mips5/
Dvalid.s87 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
88 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/mips64/
Dvalid.s92 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
93 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s101 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
102 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s101 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
102 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s101 …dsll32 $zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
102 …dsll32 $zero,$zero,18 # CHECK: dsll32 $zero, $zero, 18 # encoding: [0x00,0x00,0x04,0x…
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips3.s28 …dsll32 $zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
29 …dsll32 $zero,$zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
Dinvalid-mips5.s28 …dsll32 $zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
29 …dsll32 $zero,$zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
Dinvalid-mips4.s29 …dsll32 $zero,$zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
30 …dsll32 $zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips3.s32 …dsll32 $zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
33 …dsll32 $zero,$zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
Dinvalid-mips4.s31 …dsll32 $zero,$zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
32 …dsll32 $zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
Dinvalid-mips5.s30 …dsll32 $zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
31 …dsll32 $zero,$zero,18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
/external/v8/src/mips64/
Dbuiltins-mips64.cc353 __ dsll32(a0, a0, 0); in Generate_JSConstructStubHelper() local
551 __ dsll32(a0, a3, 0); in Generate_JSConstructStubHelper() local
788 __ dsll32(a3, a3, 0); // int32_t -> int64_t. in Generate_JSEntryTrampolineHelper() local
1438 __ dsll32(a0, a0, 0); in EnterArgumentsAdaptorFrame() local
/external/llvm/test/MC/Disassembler/Mips/mips3/
Dvalid-mips3.txt76 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
77 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
Dvalid-mips3-el.txt76 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
77 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64.txt92 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
93 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
Dvalid-mips64-el.txt92 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
93 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
/external/llvm/test/MC/Disassembler/Mips/mips4/
Dvalid-mips4-el.txt80 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
81 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
Dvalid-mips4.txt80 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
81 0x00 0x00 0x04 0xbc # CHECK: dsll32 $zero, $zero, 18
/external/llvm/test/MC/Disassembler/Mips/mips64r5/
Dvalid-mips64r5-el.txt95 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18
96 0xbc 0x04 0x00 0x00 # CHECK: dsll32 $zero, $zero, 18

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