/external/llvm/test/MC/Mips/mips2/ |
D | valid.s | 42 c.sf.s $f14,$f22 47 cvt.d.s $f22,$f28 50 cvt.s.w $f22,$f15 124 sqrt.d $f17,$f22 139 sub.s $f23,$f22,$f22 170 trunc.w.d $f22,$f15
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D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips1/ |
D | valid.s | 30 c.sf.s $f14,$f22 33 cvt.d.s $f22,$f28 36 cvt.s.w $f22,$f15 111 sub.s $f23,$f22,$f22
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D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips32/ |
D | valid.s | 47 c.sf.s $f14,$f22 54 cvt.d.s $f22,$f28 57 cvt.s.w $f22,$f15 154 sqrt.d $f17,$f22 169 sub.s $f23,$f22,$f22 200 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips4/ |
D | valid.s | 47 c.sf.s $f14,$f22 55 cvt.d.s $f22,$f28 61 cvt.s.w $f22,$f15 142 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1] 214 sqrt.d $f17,$f22 229 sub.s $f23,$f22,$f22 262 trunc.w.d $f22,$f15
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D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips5/ |
D | valid.s | 47 c.sf.s $f14,$f22 55 cvt.d.s $f22,$f28 61 cvt.s.w $f22,$f15 143 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1] 215 sqrt.d $f17,$f22 230 sub.s $f23,$f22,$f22 264 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips32r3/ |
D | valid.s | 47 c.sf.s $f14,$f22 54 cvt.d.s $f22,$f28 59 cvt.s.w $f22,$f15 189 sqrt.d $f17,$f22 204 sub.s $f23,$f22,$f22 237 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips32r5/ |
D | valid.s | 47 c.sf.s $f14,$f22 54 cvt.d.s $f22,$f28 59 cvt.s.w $f22,$f15 189 sqrt.d $f17,$f22 204 sub.s $f23,$f22,$f22 237 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips32r2/ |
D | valid.s | 47 c.sf.s $f14,$f22 54 cvt.d.s $f22,$f28 59 cvt.s.w $f22,$f15 189 sqrt.d $f17,$f22 204 sub.s $f23,$f22,$f22 237 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Mips/mips3/ |
D | valid.s | 43 c.sf.s $f14,$f22 51 cvt.d.s $f22,$f28 57 cvt.s.w $f22,$f15 186 sqrt.d $f17,$f22 201 sub.s $f23,$f22,$f22 233 trunc.w.d $f22,$f15
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D | invalid-mips5-wrong-error.s | 9 abs.ps $f22,$f8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 31 madd.ps $f22,$f3,$f14,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction 32 mov.ps $f22,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
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/external/llvm/test/MC/Mips/mips64/ |
D | valid.s | 47 c.sf.s $f14,$f22 57 cvt.d.s $f22,$f28 63 cvt.s.w $f22,$f15 152 madd.d $f18, $f22, $f26, $f20 # encoding: [0x4e,0xd4,0xd4,0xa1] 231 sqrt.d $f17,$f22 246 sub.s $f23,$f22,$f22 281 trunc.w.d $f22,$f15
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/external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
D | valid-xfail-mips32r5.txt | 31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 58 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2 59 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16 81 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22
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/external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
D | valid-xfail-mips32r3.txt | 31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 58 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2 59 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16 81 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22
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/external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
D | valid-xfail-mips32r2.txt | 31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8 38 0x46 0xde 0xb0 0x3b # CHECK: c.ngl.ps $f22, $f30 58 0x4c 0x42 0x75 0xa6 # CHECK: madd.ps $f22, $f2, $f14, $f2 59 0x46 0xc0 0x85 0x86 # CHECK: mov.ps $f22, $f16 81 0x46 0x20 0xb5 0x89 # CHECK: trunc.l.d $f22, $f22
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/external/llvm/test/MC/Disassembler/Mips/mips2/ |
D | valid-mips2.txt | 35 0x46 0x16 0x70 0x38 # CHECK: c.sf.s $f14, $f22 40 0x46 0x00 0xe5 0xa1 # CHECK: cvt.d.s $f22, $f28 43 0x46 0x80 0x7d 0xa0 # CHECK: cvt.s.w $f22, $f15 112 0x46 0x20 0xb4 0x04 # CHECK: sqrt.d $f16, $f22 127 0x46 0x16 0xb5 0xc1 # CHECK: sub.s $f23, $f22, $f22 157 0x46 0x20 0x75 0x8d # CHECK: trunc.w.d $f22, $f14
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D | valid-mips2-el.txt | 35 0x38 0x70 0x16 0x46 # CHECK: c.sf.s $f14, $f22 40 0xa1 0xe5 0x00 0x46 # CHECK: cvt.d.s $f22, $f28 43 0xa0 0x7d 0x80 0x46 # CHECK: cvt.s.w $f22, $f15 112 0x04 0xb4 0x20 0x46 # CHECK: sqrt.d $f16, $f22 127 0xc1 0xb5 0x16 0x46 # CHECK: sub.s $f23, $f22, $f22 157 0x8d 0x75 0x20 0x46 # CHECK: trunc.w.d $f22, $f14
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/external/valgrind/none/tests/mips32/ |
D | MoveIns.c | 305 TESTINSNMOVE("mfc1 $v1, $f22", 20, f22, v1); in main() 334 TESTINSNMOVEt("mtc1 $v1, $f22", 22, f22, v1); in main() 363 TESTINSNMOVE1s("mov.s $f21, $f22", 20, f21, f22); in main() 364 TESTINSNMOVE1s("mov.s $f22, $f23", 24, f22, f23); in main() 391 TESTINSNMOVE1d("mov.d $f20, $f22", 24, f20, f22); in main() 392 TESTINSNMOVE1d("mov.d $f20, $f22", 32, f20, f22); in main() 393 TESTINSNMOVE1d("mov.d $f22, $f24", 40, f22, f24); in main() 394 TESTINSNMOVE1d("mov.d $f22, $f24", 48, f22, f24); in main()
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-regs.s | 61 #CHECK: .cfi_offset f22, 476 62 #CHECK: .cfi_offset f22, 484 178 .cfi_offset f22,476 179 .cfi_offset f22,484
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/external/llvm/test/CodeGen/PowerPC/ |
D | vsx-spill.ll | 10 …1},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f2… 31 …1},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f2… 51 …1},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f2…
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/external/llvm/test/MC/Disassembler/Mips/mips1/ |
D | valid-mips1.txt | 30 0x46 0x16 0x70 0x38 # CHECK: c.sf.s $f14, $f22 33 0x46 0x00 0xe5 0xa1 # CHECK: cvt.d.s $f22, $f28 36 0x46 0x80 0x7d 0xa0 # CHECK: cvt.s.w $f22, $f15 105 0x46 0x16 0xb5 0xc1 # CHECK: sub.s $f23, $f22, $f22
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D | valid-mips1-el.txt | 30 0x38 0x70 0x16 0x46 # CHECK: c.sf.s $f14, $f22 33 0xa1 0xe5 0x00 0x46 # CHECK: cvt.d.s $f22, $f28 36 0xa0 0x7d 0x80 0x46 # CHECK: cvt.s.w $f22, $f15 105 0xc1 0xb5 0x16 0x46 # CHECK: sub.s $f23, $f22, $f22
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/external/llvm/test/MC/Mips/mips64r3/ |
D | valid.s | 47 c.sf.s $f14,$f22 57 cvt.d.s $f22,$f28 63 cvt.s.w $f22,$f15 257 sqrt.d $f17,$f22 272 sub.s $f23,$f22,$f22 307 trunc.w.d $f22,$f15
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