| /external/llvm/test/MC/Mips/ |
| D | micromips-fpu-instructions.s | 12 # CHECK-EL: add.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x20]
13 # CHECK-EL: add.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x30,0x21]
14 # CHECK-EL: div.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x20]
15 # CHECK-EL: div.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xf0,0x21]
16 # CHECK-EL: mul.s $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x20]
17 # CHECK-EL: mul.d $f4, $f6, $f8 # encoding: [0x06,0x55,0xb0,0x21]
18 # CHECK-EL: sub.s $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x20]
19 # CHECK-EL: sub.d $f4, $f6, $f8 # encoding: [0x06,0x55,0x70,0x21]
30 # CHECK-EL: ceil.w.s $f6, $f8 # encoding: [0xc8,0x54,0x3b,0x1b]
31 # CHECK-EL: ceil.w.d $f6, $f8 # encoding: [0xc8,0x54,0x3b,0x5b]
[all …]
|
| D | mips64-instructions.s | 4 # CHECK: sdxc1 $f8, $4($25) # encoding: [0x09,0x40,0x24,0x4f]
7 sdxc1 $f8, $a0($t9)
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | vector.ll | 9 %f8 = type <8 x float>
38 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
39 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
40 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
41 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
42 store %f8 %R, %f8* %S
46 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
47 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
48 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
49 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
|
| /external/llvm/test/CodeGen/X86/ |
| D | vector.ll | 9 %f8 = type <8 x float>
39 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
40 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
41 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
42 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
43 store %f8 %R, %f8* %S
47 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
48 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
49 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
50 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
|
| D | coff-comdat.ll | 45 $f8 = comdat any
46 define x86_fastcallcc void @v8() comdat($f8) {
49 define x86_fastcallcc void @f8() comdat($f8) {
72 ; CHECK: .section .text,"xr",associative,@f8@0
74 ; CHECK: .section .text,"xr",discard,@f8@0
75 ; CHECK: .globl @f8@0
|
| D | tls-models.ll | 159 define i32* @f8() {
164 ; X64-LABEL: f8:
166 ; X32-LABEL: f8:
168 ; X64_PIC-LABEL: f8:
170 ; X32_PIC-LABEL: f8:
172 ; DARWIN-LABEL: f8:
|
| /external/llvm/test/CodeGen/Generic/ |
| D | vector.ll | 8 %f8 = type <8 x float>
37 define void @test_f8(%f8* %P, %f8* %Q, %f8* %S) {
38 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
39 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
40 %R = fadd %f8 %p, %q ; <%f8> [#uses=1]
41 store %f8 %R, %f8* %S
45 define void @test_fmul(%f8* %P, %f8* %Q, %f8* %S) {
46 %p = load %f8, %f8* %P ; <%f8> [#uses=1]
47 %q = load %f8, %f8* %Q ; <%f8> [#uses=1]
48 %R = fmul %f8 %p, %q ; <%f8> [#uses=1]
[all …]
|
| D | v-split.ll | 2 %f8 = type <8 x float>
4 define void @test_f8(%f8 *%P, %f8* %Q, %f8 *%S) {
5 %p = load %f8, %f8* %P
6 %q = load %f8, %f8* %Q
7 %R = fadd %f8 %p, %q
8 store %f8 %R, %f8 *%S
|
| /external/llvm/test/MC/Sparc/ |
| D | sparc-fp-instructions.s | 60 ! CHECK: fadds %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x24]
61 ! CHECK: faddd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x44]
62 ! CHECK: faddq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x64]
63 fadds %f0, %f4, %f8
64 faddd %f0, %f4, %f8
65 faddq %f0, %f4, %f8
73 ! CHECK: fsubs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xa4]
74 ! CHECK: fsubd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xc4]
75 ! CHECK: fsubq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xe4]
76 fsubs %f0, %f4, %f8
[all …]
|
| /external/llvm/test/MC/Disassembler/Sparc/ |
| D | sparc-fp.txt | 75 # CHECK: fadds %f0, %f4, %f8
78 # CHECK: faddd %f0, %f4, %f8
81 # CHECK: faddq %f0, %f4, %f8
90 # CHECK: fsubs %f0, %f4, %f8
93 # CHECK: fsubd %f0, %f4, %f8
96 # CHECK: fsubq %f0, %f4, %f8
99 # CHECK: fmuls %f0, %f4, %f8
102 # CHECK: fmuld %f0, %f4, %f8
105 # CHECK: fmulq %f0, %f4, %f8
108 # CHECK: fsmuld %f0, %f4, %f8
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-xfail-mips64r2.txt | 12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
63 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r5/ |
| D | valid-xfail-mips64r5.txt | 12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
63 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r3/ |
| D | valid-xfail-mips64r3.txt | 12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
62 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
63 0x4d 0x1e 0x87 0xb9 # CHECK: nmsub.d $f30, $f8, $f16, $f30
65 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
67 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
68 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
[all …]
|
| /external/clang/test/Sema/ |
| D | expr-address-of.c | 111 void f8() { in f8() function
112 void *dummy0 = &f8(); // expected-error {{cannot take the address of an rvalue of type 'void'}} in f8()
115 …void *dummy1 = &(1 ? v : f8()); // expected-error {{cannot take the address of an rvalue of type '… in f8()
117 …void *dummy2 = &(f8(), v); // expected-error {{cannot take the address of an rvalue of type 'void'… in f8()
|
| /external/clang/test/CodeGen/ |
| D | inline2.c | 52 extern int f8(void);
53 extern inline int f8(void) { return 0; } in f8() function
65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() in test_all()
|
| /external/llvm/test/MC/SystemZ/ |
| D | regs-good.s | 61 #CHECK: ler %f8, %f9 # encoding: [0x38,0x89]
70 ler %f8,%f9
79 #CHECK: ldr %f8, %f9 # encoding: [0x28,0x89]
88 ldr %f8,%f9
95 #CHECK: lxr %f8, %f9 # encoding: [0xb3,0x65,0x00,0x89]
100 lxr %f8,%f9
127 #CHECK: .cfi_offset %f8, 192
161 .cfi_offset %f8,192
|
| /external/mesa3d/src/mesa/sparc/ |
| D | xform.S | 79 ld [%g1 + 0x00], %f8 ! LSU Group
86 fmuls %f8, M0, %f9 ! FGM Group f1 available
89 fmuls %f8, M1, %f10 ! FGM Group f2 available
92 fmuls %f8, M2, %f11 ! FGM Group f3 available
95 fmuls %f8, M3, %f12 ! FGM Group f4 available
194 ld [%g1 + 0x00], %f8 ! LSU Group
199 fmuls %f8, M0, %f9 ! FGM Group
200 fmuls %f8, M1, %f10 ! FGM Group
469 fmuls %f1, M6, %f8 ! FGM
476 fadds %f4, %f8, %f4 ! FGA Group f8 available
[all …]
|
| D | norm.S | 65 fmuls %f1, M9, %f8 ! FGM Group f4 available
71 fadds %f7, %f8, %f7 ! FGA Group f8,f3 available
80 fmuls %f5, %f5, %f8 ! FGM Group f5 available
82 fadds %f6, %f8, %f6 ! FGA Group 2cyc stall f6,f8 available
130 fmuls %f1, M9, %f8 ! FGM Group f4 available
136 fadds %f7, %f8, %f7 ! FGA Group f8,f3 available
207 fmuls %f5, %f5, %f8 ! FGM Group f5 available
209 fadds %f6, %f8, %f6 ! FGA Group 2cyc stall f6,f8 available
363 fmuls %f1, M9, %f8 ! FGM Group f4 available
369 fadds %f7, %f8, %f7 ! FGA Group f8,f3 available
[all …]
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | frame-04.ll | 14 ; CHECK: std %f8, 216(%r15)
22 ; CHECK: .cfi_offset %f8, -168
31 ; CHECK: ld %f8, 216(%r15)
74 ; CHECK: std %f8, 200(%r15)
80 ; CHECK: .cfi_offset %f8, -168
89 ; CHECK: ld %f8, 200(%r15)
122 ; numerical order so the pair should be %f8+%f10.
127 ; CHECK: std %f8, 168(%r15)
129 ; CHECK: .cfi_offset %f8, -168
138 ; CHECK: ld %f8, 168(%r15)
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r5/ |
| D | valid-xfail-mips32r5.txt | 12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r3/ |
| D | valid-xfail-mips32r3.txt | 12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r2/ |
| D | valid-xfail-mips32r2.txt | 12 0x46 0x08 0x5b 0x3d # CHECK: c.nge.s $fcc3, $f11, $f8
16 0x46 0x0d 0x45 0x3f # CHECK: c.ngt.s $fcc5, $f8, $f13
31 0x46 0xc0 0x45 0x85 # CHECK: abs.ps $f22, $f8
35 0x46 0xd4 0x42 0x3e # CHECK: c.le.ps $fcc2, $f8, $f20
41 0x46 0xc8 0xa6 0x36 # CHECK: c.ole.ps $fcc6, $f20, $f8
66 0x4c 0x98 0x46 0xb6 # CHECK: nmadd.ps $f26, $f4, $f8, $f24
68 0x46 0xde 0x46 0x2c # CHECK: pll.ps $f24, $f8, $f30
70 0x46 0xda 0xf2 0x2e # CHECK: pul.ps $f8, $f30, $f26
71 0x46 0xc2 0x46 0x2f # CHECK: puu.ps $f24, $f8, $f2
79 0x46 0x00 0x41 0x16 # CHECK: rsqrt.s $f4, $f8
|
| /external/clang/test/SemaTemplate/ |
| D | dependent-type-identity.cpp | 68 void f8(typename N::X2<T>::template apply<U> *); // expected-note{{previous}}
69 void f8(typename N::X2<U>::template apply<U> *);
70 void f8(typename N::X2<U>::template apply<T> *);
71 void f8(typename ::Nalias::X2<type>::template apply<U_type> *); // expected-error{{redeclar}}
|
| /external/llvm/test/CodeGen/Mips/ |
| D | remat-immed-load.ll | 46 tail call void @f8(i64 65536) nounwind
47 tail call void @f8(i64 65536) nounwind
51 declare void @f8(i64)
|
| /external/elfutils/src/tests/ |
| D | testfile44.expect.bz2 | |