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/external/clang/test/CodeGen/
Dinline2.c57 extern inline int f9(void);
58 extern inline int f9(void) { return 0; } in f9() function
65 return f0() + f1() + f2() + f3() + f4() + f5() + f6() + f7() + f8() + f9() in test_all()
/external/llvm/test/MC/SystemZ/
Dregs-good.s61 #CHECK: ler %f8, %f9 # encoding: [0x38,0x89]
70 ler %f8,%f9
79 #CHECK: ldr %f8, %f9 # encoding: [0x28,0x89]
88 ldr %f8,%f9
95 #CHECK: lxr %f8, %f9 # encoding: [0xb3,0x65,0x00,0x89]
100 lxr %f8,%f9
128 #CHECK: .cfi_offset %f9, 200
162 .cfi_offset %f9,200
/external/clang/test/SemaObjCXX/
Darc-overloading.mm148 int &f9(__strong id&); function
149 float &f9(const __autoreleasing id&); function
157 int &ir1 = f9(strong_id);
158 float &fr1 = f9(autoreleasing_id);
159 float &fr2 = f9(unsafe_id);
160 float &fr2a = f9(weak_id);
166 float &fr3 = f9(strong_a);
167 float &fr4 = f9(autoreleasing_a);
168 float &fr5 = f9(unsafe_unretained_a);
169 float &fr6 = f9(weak_a);
/external/mesa3d/src/mesa/sparc/
Dxform.S86 fmuls %f8, M0, %f9 ! FGM Group f1 available
98 fadds %f9, M12, %f9 ! FGA Group f9 available
99 st %f9, [%g2 + 0x10] ! LSU
199 fmuls %f8, M0, %f9 ! FGM Group
205 fadds %f9, M12, %f11 ! FGA Group f9 available
471 fmuls %f1, M7, %f9 ! FGM
478 fadds %f5, %f9, %f5 ! FGA Group f9 available
541 ld [%g1 + 0x04], %f9 ! LSU Group
549 fmuls %f9, M4, %f12 ! FGM Group
550 fmuls %f9, M5, %f13 ! FGM Group
[all …]
/external/llvm/test/MC/Mips/mips4/
Dinvalid-mips5-wrong-error.s12 c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
45 puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips2/
Dinvalid-mips5-wrong-error.s12 c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
45 puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips5-wrong-error.s12 c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
45 puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips3/
Dinvalid-mips5-wrong-error.s12 c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
40 nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
45 puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips5-wrong-error.s15 … c.eq.ps $fcc5,$f0,$f9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
42 … nmadd.ps $f27,$f4,$f9,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
44 … pll.ps $f25,$f9,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
46 … pul.ps $f9,$f30,$f26 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
47 … puu.ps $f24,$f9,$f2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: unknown instruction
/external/llvm/test/CodeGen/SystemZ/
Dframe-04.ll15 ; CHECK: std %f9, 208(%r15)
23 ; CHECK: .cfi_offset %f9, -176
32 ; CHECK: ld %f9, 208(%r15)
75 ; CHECK: std %f9, 192(%r15)
81 ; CHECK: .cfi_offset %f9, -176
90 ; CHECK: ld %f9, 192(%r15)
131 ; CHECK-NOT: %f9
166 ; CHECK-NOT: %f9
Dframe-07.ll16 ; CHECK-NOFP: stdy %f9, 4112(%r15)
24 ; CHECK-NOFP: .cfi_offset %f9, -176
33 ; CHECK-NOFP: ldy %f9, 4112(%r15)
50 ; CHECK-FP: stdy %f9, 4112(%r11)
59 ; CHECK-FP: ldy %f9, 4112(%r11)
137 ; CHECK-NOFP: std %f9, 16({{%r[1-5]}},%r15)
145 ; CHECK-NOFP: .cfi_offset %f9, -176
154 ; CHECK-NOFP: ld %f9, 16({{%r[1-5]}},%r15)
170 ; CHECK-FP: std %f9, 16({{%r[1-5]}},%r11)
178 ; CHECK-FP: .cfi_offset %f9, -176
[all …]
Dframe-02.ll14 ; CHECK: std %f9, 208(%r15)
22 ; CHECK: .cfi_offset %f9, -176
31 ; CHECK: ld %f9, 208(%r15)
98 ; CHECK: std %f9, 200(%r15)
105 ; CHECK: .cfi_offset %f9, -176
114 ; CHECK: ld %f9, 200(%r15)
177 ; CHECK-NOT: %f9
224 ; CHECK-NOT: %f9
Dframe-03.ll16 ; CHECK: std %f9, 208(%r15)
24 ; CHECK: .cfi_offset %f9, -176
33 ; CHECK: ld %f9, 208(%r15)
100 ; CHECK: std %f9, 200(%r15)
107 ; CHECK: .cfi_offset %f9, -176
116 ; CHECK: ld %f9, 200(%r15)
179 ; CHECK-NOT: %f9
226 ; CHECK-NOT: %f9
Dframe-17.ll12 ; CHECK: std %f9, 216(%r15)
25 ; CHECK: ld %f9, 216(%r15)
76 ; CHECK: std %f9, 216(%r15)
86 ; CHECK: ld %f9, 216(%r15)
137 ; CHECK: std %f9, 224(%r15)
149 ; CHECK: ld %f9, 224(%r15)
/external/llvm/test/MC/Mips/
Dmips-fpu-instructions.s12 # CHECK: add.s $f9, $f6, $f7 # encoding: [0x40,0x32,0x07,0x46]
18 # CHECK: mul.s $f9, $f6, $f7 # encoding: [0x42,0x32,0x07,0x46]
26 # CHECK: sub.s $f9, $f6, $f7 # encoding: [0x41,0x32,0x07,0x46]
33 add.s $f9,$f6,$f7
39 mul.s $f9,$f6, $f7
47 sub.s $f9,$f6,$f7
154 # CHECK: swc1 $f9, 9158($7) # encoding: [0xc6,0x23,0xe9,0xe4]
189 swc1 $f9,9158($a3)
/external/llvm/test/MC/Disassembler/Mips/mips64/
Dvalid-mips64-xfail.txt9 0x46 0x23 0x4b 0x3c # CHECK: c.lt.d $fcc3, $f9, $f3
34 0x46 0xc9 0x05 0x32 # CHECK: c.eq.ps $fcc5, $f0, $f9
66 0x4d 0x33 0x74 0xb1 # CHECK: nmadd.d $f18, $f9, $f14, $f19
67 0x4c 0x99 0x4e 0xf6 # CHECK: nmadd.ps $f27, $f4, $f9, $f25
72 0x46 0xde 0x4e 0x6c # CHECK: pll.ps $f25, $f9, $f30
74 0x46 0xda 0xf2 0x6e # CHECK: pul.ps $f9, $f30, $f26
75 0x46 0xc2 0x4e 0x2f # CHECK: puu.ps $f24, $f9, $f2
/external/v8/test/webkit/
DtoString-elision-trailing-comma-expected.txt70 PASS f9().length is 5
71 PASS f9()[5-1] is 5
72 PASS unevalf(eval(unevalf(f9))) is unevalf(f9)
73 PASS eval(unevalf(f9))().length is 5
74 PASS eval(unevalf(f9))()[5-1] is 5
/external/v8/test/mjsunit/compiler/
Dloopcount.js80 function f9() { function
86 assertEquals(42, f9());
/external/clang/test/CXX/except/except.spec/
Dp5-virtual.cpp37 virtual void f9() noexcept(false);
73 virtual void f9() noexcept(true);
/external/llvm/test/CodeGen/ARM/
Dfpconv.ll84 define float @f9(i32 %a) {
85 ;CHECK-VFP-LABEL: f9:
87 ;CHECK-LABEL: f9:
/external/llvm/test/MC/Disassembler/Mips/
Dmips32r2.txt14 # CHECK: add.s $f9, $f6, $f7
233 # CHECK: ldc1 $f9, 9158($7)
254 # CHECK: lwc1 $f9, 9158($7)
305 # CHECK: mul.s $f9, $f6, $f7
356 # CHECK: sdc1 $f9, 9158($7)
407 # CHECK: sub.s $f9, $f6, $f7
422 # CHECK: swc1 $f9, 9158($7)
Dmips32_le.txt14 # CHECK: add.s $f9, $f6, $f7
224 # CHECK: ldc1 $f9, 9158($7)
242 # CHECK: lwc1 $f9, 9158($7)
314 # CHECK: mul.s $f9, $f6, $f7
359 # CHECK: sdc1 $f9, 9158($7)
404 # CHECK: sub.s $f9, $f6, $f7
416 # CHECK: swc1 $f9, 9158($7)
Dmips32.txt15 # CHECK: add.s $f9, $f6, $f7
225 # CHECK: ldc1 $f9, 9158($7)
243 # CHECK: lwc1 $f9, 9158($7)
309 # CHECK: mul.s $f9, $f6, $f7
354 # CHECK: sdc1 $f9, 9158($7)
399 # CHECK: sub.s $f9, $f6, $f7
411 # CHECK: swc1 $f9, 9158($7)
Dmips32r2_le.txt14 # CHECK: add.s $f9, $f6, $f7
233 # CHECK: ldc1 $f9, 9158($7)
254 # CHECK: lwc1 $f9, 9158($7)
305 # CHECK: mul.s $f9, $f6, $f7
356 # CHECK: sdc1 $f9, 9158($7)
407 # CHECK: sub.s $f9, $f6, $f7
422 # CHECK: swc1 $f9, 9158($7)
/external/llvm/test/MC/Disassembler/Mips/mips32/
Dvalid-mips32-el.txt6 0x40 0x32 0x07 0x46 # CHECK: add.s $f9, $f6, $f7
78 0xc6 0x23 0xe9 0xd4 # CHECK: ldc1 $f9, 9158($7)
84 0xc6 0x23 0xe9 0xc4 # CHECK: lwc1 $f9, 9158($7)
100 0x42 0x32 0x07 0x46 # CHECK: mul.s $f9, $f6, $f7
115 0xc6 0x23 0xe9 0xf4 # CHECK: sdc1 $f9, 9158($7)
130 0x41 0x32 0x07 0x46 # CHECK: sub.s $f9, $f6, $f7
134 0xc6 0x23 0xe9 0xe4 # CHECK: swc1 $f9, 9158($7)

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