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Searched refs:fastEmit_ri_ (Results 1 – 3 of 3) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DFastISel.cpp411 fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op1, Op1IsKill, in selectBinaryOp()
444 unsigned ResultReg = fastEmit_ri_(VT.getSimpleVT(), ISDOpcode, Op0, in selectBinaryOp()
506 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
525 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
534 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
550 IdxN = fastEmit_ri_(VT, ISD::MUL, IdxN, IdxNIsKill, ElementSize, VT); in selectGetElementPtr()
561 N = fastEmit_ri_(VT, ISD::ADD, N, NIsKill, TotalOffs, VT); in selectGetElementPtr()
1416 unsigned IntResultReg = fastEmit_ri_( in selectFNeg()
1653 unsigned FastISel::fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, in fastEmit_ri_() function in FastISel
/external/llvm/include/llvm/CodeGen/
DFastISel.h368 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
/external/llvm/lib/Target/ARM/
DARMFastISel.cpp908 Addr.Base.Reg = fastEmit_ri_(MVT::i32, ISD::ADD, Addr.Base.Reg, in ARMSimplifyAddress()