/external/llvm/test/MC/AArch64/ |
D | neon-scalar-fp-compare.s | 9 fcmeq s10, s11, s12 10 fcmeq d20, d21, d22 19 fcmeq s10, s11, #0.0 20 fcmeq d20, d21, #0.0 21 fcmeq s10, s11, #0 22 fcmeq d20, d21, #0x0
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D | neon-compare-instructions.s | 197 fcmeq v0.2s, v31.2s, v16.2s 198 fcmeq v4.4s, v7.4s, v15.4s 199 fcmeq v29.2d, v2.2d, v5.2d 346 fcmeq v0.2s, v31.2s, #0.0 347 fcmeq v4.4s, v7.4s, #0.0 348 fcmeq v29.2d, v2.2d, #0.0 349 fcmeq v0.2s, v31.2s, #0 350 fcmeq v4.4s, v7.4s, #0 351 fcmeq v29.2d, v2.2d, #0
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D | optional-hash.s | 15 fcmeq v0.2s, v31.2s, 0.0
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D | neon-diagnostics.s | 541 fcmeq v0.2d, v1.2s, v2.2d 542 fcmeq v0.16b, v1.16b, v2.16b 543 fcmeq v0.8b, v1.4h, v2.4h 673 fcmeq v0.2d, v1.2s, #0.0 674 fcmeq v0.16b, v1.16b, #0.0 675 fcmeq v0.8b, v1.4h, #1.0 676 fcmeq v0.8b, v1.4h, #1 4607 fcmeq s10, h11, s12 4608 fcmeq d20, s21, d22 4621 fcmeq h10, s11, #0.0 [all …]
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D | arm64-advsimd.s | 313 fcmeq.2s v0, v0, v0 383 ; CHECK: fcmeq.2s v0, v0, v0 ; encoding: [0x00,0xe4,0x20,0x0e] 592 fcmeq.2s v0, v0, #0 611 ; CHECK: fcmeq.2s v0, v0, #0.0 ; encoding: [0x00,0xd8,0xa0,0x0e]
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-neon-select_cc.ll | 17 ; CHECK: fcmeq [[MASK:v[0-9]+]].2s, v0.2s, v1.2s 27 ; CHECK: fcmeq d[[MASK:[0-9]+]], d0, d1 48 ; CHECK: fcmeq [[MASK:v[0-9]+]].4s, v0.4s, v1.4s 58 ; CHECK: fcmeq [[MASK:v[0-9]+]].2d, v0.2d, v1.2d 139 ; CHECK: fcmeq [[MASK:v[0-9]+]].2s, v0.2s, v1.2s 148 ; CHECK: fcmeq [[MASK:v[0-9]+]].2s, v0.2s, v1.2s 158 ; CHECK: fcmeq [[MASK:v[0-9]+]].4s, v0.4s, v1.4s 180 ; CHECK: fcmeq d[[MASK:[0-9]+]], d0, d1 200 ; CHECK: fcmeq [[MASK:v[0-9]+]].2d, v0.2d, v1.2d
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D | arm64-setcc-int-to-fp-combine.ll | 5 ; CHECK-NEXT: fcmeq.4s v0, v0, v1 40 ; CHECK-NEXT: fcmeq.4s v0, v0, v1
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D | arm64-neon-v1i1-setcc.ll | 37 ; CHECK: fcmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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D | aarch64-neon-v1i1-setcc.ll | 41 ; CHECK: fcmeq d{{[0-9]+}}, d{{[0-9]+}}, d{{[0-9]+}}
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D | neon-compare-instructions.ll | 1320 ; CHECK: fcmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 1328 ; CHECK: fcmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1335 ; CHECK: fcmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 1729 ; CHECK: fcmeq {{v[0-9]+}}.2s, v0.2s, v1.2s 1740 ; CHECK: fcmeq {{v[0-9]+}}.4s, v0.4s, v1.4s 1750 ; CHECK: fcmeq {{v[0-9]+}}.2d, v0.2d, v1.2d 1759 ; CHECK: fcmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}} 1767 ; CHECK: fcmeq {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, #{{0.0|0}} 1774 ; CHECK: fcmeq {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, #{{0.0|0}} 2095 ; CHECK: fcmeq {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, #{{0.0|0}} [all …]
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D | arm64-vcmp.ll | 191 ; CHECK: fcmeq {{d[0-9]+}}, d0, d1
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D | arm64-neon-compare-instructions.ll | 1155 ; CHECK: fcmeq d0, d0, #0
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 230 # CHECK: fcmeq v0.2s, v15.2s, v16.2s 278 # CHECK: fcmeq v15.2s, v21.2s, #0.0 1622 # CHECK: fcmeq s10, s11, s12 1623 # CHECK: fcmeq d20, d21, d22 1630 # CHECK: fcmeq s10, s11, #0.0 1631 # CHECK: fcmeq d20, d21, #0.0
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D | arm64-advsimd.txt | 298 # CHECK: fcmeq.2s v0, v0, v0 538 # CHECK: fcmeq.2s v0, v0, #0
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/external/vixl/test/ |
D | test-simulator-a64.cc | 3729 DEFINE_TEST_NEON_3SAME_FP(fcmeq, Basic) 3794 DEFINE_TEST_NEON_3SAME_FP_SCALAR(fcmeq, Basic) 3947 DEFINE_TEST_NEON_2OPIMM_FCMP_ZERO(fcmeq, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD() 4001 DEFINE_TEST_NEON_2OPIMM_FP_SCALAR_SD(fcmeq, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
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/external/vixl/src/vixl/a64/ |
D | macro-assembler-a64.h | 2102 V(fcmeq, Fcmeq) \ 2308 V(fcmeq, Fcmeq) \ in NEON_2VREG_MACRO_LIST()
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D | assembler-a64.h | 3565 void fcmeq(const VRegister& vd, 3580 void fcmeq(const VRegister& vd,
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D | assembler-a64.cc | 3125 void Assembler::fcmeq(const VRegister& vd, in fcmeq() function in vixl::Assembler 3252 V(fcmeq, NEON_FCMEQ, NEON_FCMEQ_scalar) \
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/external/vixl/doc/ |
D | supported-instructions.md | 1747 void fcmeq(const VRegister& vd, 1756 void fcmeq(const VRegister& vd,
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.stdout.exp | 14348 fcmeq v2.2d, v23.2d, v11.2d cc1edb8be1f468b449e87dd22eef6c52 978034cf287f804e7ece8cedd52fd9f0 f… 14349 fcmeq v2.4s, v23.4s, v11.4s 5fb571c4030f1099df95b2efece91f25 e736af3548e98874b77061b100f6f0e4 e… 14350 fcmeq v2.2s, v23.2s, v11.2s 8c933ae059e561a39b2b9f689a30b104 d692722d428ef08c5d9844bf02c9dbf3 f… 19863 fcmeq v2.2d, v23.2d, #0 b2347e511081da9c48d309e2f96feb17 d86dc086e2398abc76ab0c8619ae557a 00000… 19864 fcmeq v2.4s, v23.4s, #0 56570fe140f803fb7c26eed7f97d32b4 2594d0fc949f37487d2f31863508d019 00000… 19865 fcmeq v2.2s, v23.2s, #0 732e4f0f0d8fadd24d62067e7a9f3e9c 248807699abd5c2459b40191880d08dc 00000…
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2555 defm FCMEQ : SIMDFPCmpTwoVector<0, 1, 0b01101, "fcmeq", AArch64fcmeqz>; 2718 defm FCMEQ : SIMDThreeSameVectorFPCmp<0, 0, 0b11100, "fcmeq", AArch64fcmeq>; 2994 defm FCMEQ : SIMDThreeScalarFPCmp<0, 0, 0b11100, "fcmeq", AArch64fcmeq>; 3082 defm FCMEQ : SIMDCmpTwoScalarSD<0, 1, 0b01101, "fcmeq", AArch64fcmeqz>;
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