Home
last modified time | relevance | path

Searched refs:fcmge (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-scalar-fp-compare.s33 fcmge s10, s11, s12
34 fcmge d20, d21, d22
43 fcmge s10, s11, #0.0
44 fcmge d20, d21, #0.0
45 fcmge s10, s11, #0
46 fcmge d20, d21, #0x0
Dneon-compare-instructions.s211 fcmge v31.4s, v29.4s, v28.4s
212 fcmge v3.2s, v8.2s, v12.2s
213 fcmge v17.2d, v15.2d, v13.2d
363 fcmge v31.4s, v29.4s, #0.0
364 fcmge v3.2s, v8.2s, #0.0
365 fcmge v17.2d, v15.2d, #0.0
366 fcmge v31.4s, v29.4s, #0
367 fcmge v3.2s, v8.2s, #0
368 fcmge v17.2d, v15.2d, #0
Darm64-aliases.s613 ; CHECK: fcmge.2s v0, v1, v2
614 ; CHECK: fcmge.4s v0, v1, v2
615 ; CHECK: fcmge.2d v0, v1, v2
656 ; CHECK: fcmge s0, s1, s2
657 ; CHECK: fcmge d0, d1, d2
Dneon-diagnostics.s562 fcmge v31.4s, v29.2s, v28.4s
563 fcmge v3.8b, v8.2s, v12.2s
698 fcmge v31.4s, v29.2s, #0.0
699 fcmge v3.8b, v8.2s, #0.0
746 fcmge v31.4s, v29.2s, #0.0
747 fcmge v3.8b, v8.2s, #0.0
4635 fcmge s10, h11, s12
4636 fcmge d20, s21, d22
4649 fcmge h10, s11, #0.0
4650 fcmge d20, s21, #0.0
Darm64-advsimd.s314 fcmge.2s v0, v0, v0
384 ; CHECK: fcmge.2s v0, v0, v0 ; encoding: [0x00,0xe4,0x20,0x2e]
593 fcmge.2s v0, v0, #0
612 ; CHECK: fcmge.2s v0, v0, #0.0 ; encoding: [0x00,0xc8,0xa0,0x2e]
/external/llvm/test/CodeGen/AArch64/
Dneon-compare-instructions.ll1343 ; CHECK: fcmge {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
1351 ; CHECK: fcmge {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
1358 ; CHECK: fcmge {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
1391 ; CHECK: fcmge {{v[0-9]+}}.2s, v1.2s, v0.2s
1401 ; CHECK: fcmge {{v[0-9]+}}.4s, v1.4s, v0.4s
1410 ; CHECK: fcmge {{v[0-9]+}}.2d, v1.2d, v0.2d
1486 ; CHECK: fcmge {{v[0-9]+}}.2s, v0.2s, v1.2s
1499 ; CHECK: fcmge {{v[0-9]+}}.4s, v0.4s, v1.4s
1511 ; CHECK: fcmge {{v[0-9]+}}.2d, v0.2d, v1.2d
1524 ; CHECK: fcmge {{v[0-9]+}}.2s, v0.2s, v1.2s
[all …]
Darm64-vcmp.ll199 ; CHECK: fcmge {{d[0-9]+}}, d0, d1
207 ; CHECK: fcmge {{d[0-9]+}}, d1, d0
Darm64-neon-compare-instructions.ll1163 ; CHECK: fcmge d0, d0, #0
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt236 # CHECK: fcmge v31.4s, v7.4s, v29.4s
284 # CHECK: fcmge v14.2d, v13.2d, #0.0
1638 # CHECK: fcmge s10, s11, s12
1639 # CHECK: fcmge d20, d21, d22
1646 # CHECK: fcmge s10, s11, #0.0
1647 # CHECK: fcmge d20, d21, #0.0
Darm64-advsimd.txt299 # CHECK: fcmge.2s v0, v0, v0
539 # CHECK: fcmge.2s v0, v0, #0
/external/vixl/test/
Dtest-simulator-a64.cc3766 DEFINE_TEST_NEON_3SAME_FP(fcmge, Basic)
3808 DEFINE_TEST_NEON_3SAME_FP_SCALAR(fcmge, Basic)
3977 DEFINE_TEST_NEON_2OPIMM_FCMP_ZERO(fcmge, Basic, Zero) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
4021 DEFINE_TEST_NEON_2OPIMM_FP_SCALAR_SD(fcmge, Basic, Zero)
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2103 V(fcmge, Fcmge) \
2309 V(fcmge, Fcmge) \ in NEON_2VREG_MACRO_LIST()
Dassembler-a64.h3575 void fcmge(const VRegister& vd,
3590 void fcmge(const VRegister& vd,
Dassembler-a64.cc3132 void Assembler::fcmge(const VRegister& vd, in fcmge() function in vixl::Assembler
3253 V(fcmge, NEON_FCMGE, NEON_FCMGE_scalar) \
/external/vixl/doc/
Dsupported-instructions.md1765 void fcmge(const VRegister& vd,
1774 void fcmge(const VRegister& vd,
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp14351 fcmge v2.2d, v23.2d, v11.2d f66d3a7346ec2123a1ddc8521db966c3 094784497ae17de8947bba2bbe9be0f0 d…
14352 fcmge v2.4s, v23.4s, v11.4s 42f777113096137016e0b3bf59768237 230be71e5456f1df7e4d47091a6043af 2…
14353 fcmge v2.2s, v23.2s, v11.2s 13e5f24e7959fbdb1d68e1c4325d4934 c890a041336112c341426e6df80d4606 7…
19866 fcmge v2.2d, v23.2d, #0 ea1c1e3c55a5b8819de731385a34ef31 b4a9452cd4f1dab0eb9b5b06f31edd23 00000…
19868 fcmge v2.4s, v23.4s, #0 9b7e5cc7f89a04694b154f647a9c25d3 b75869a6229e924d13432146569a2f4e 00000…
19869 fcmge v2.2s, v23.2s, #0 66b6e910d8cf71e9364d4062ba37bfe1 0bf555366421625bb10c31b091e1debe 00000…
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2556 defm FCMGE : SIMDFPCmpTwoVector<1, 1, 0b01100, "fcmge", AArch64fcmgez>;
2719 defm FCMGE : SIMDThreeSameVectorFPCmp<1, 0, 0b11100, "fcmge", AArch64fcmge>;
2995 defm FCMGE : SIMDThreeScalarFPCmp<1, 0, 0b11100, "fcmge", AArch64fcmge>;
3083 defm FCMGE : SIMDCmpTwoScalarSD<1, 1, 0b01100, "fcmge", AArch64fcmgez>;