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Searched refs:fcvtl2 (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-simd-misc.s441 fcvtl2 v12.4s, v4.8h
442 fcvtl2 v17.2d, v28.4s
Darm64-advsimd.s655 fcvtl2 v3.4s, v7.8h
656 fcvtl2 v4.2d, v8.4s
660 ; CHECK: fcvtl2 v3.4s, v7.8h ; encoding: [0xe3,0x78,0x21,0x4e]
661 ; CHECK: fcvtl2 v4.2d, v8.4s ; encoding: [0x04,0x79,0x61,0x4e]
Dneon-diagnostics.s5834 fcvtl2 v9.4s, v1.4h
5835 fcvtl2 v0.2d, v1.2s
/external/llvm/test/CodeGen/AArch64/
Darm64-vcvt_f32_su32.ll46 ; CHECK: fcvtl2 v0.4s, v0.8h
Darm64-vcvt_f.ll16 ; CHECK: fcvtl2 v0.2d, v0.4s
Dfp16-v8-instructions.ll217 ; CHECK: fcvtl2 v1.4s, v0.8h
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt556 # CHECK: fcvtl2 v0.4s, v0.8h
558 # CHECK: fcvtl2 v0.2d, v0.4s
/external/vixl/src/vixl/a64/
Dsimulator-a64.h2455 LogicVRegister fcvtl2(VectorFormat vform,
Dmacro-assembler-a64.h1196 fcvtl2(vd, vn); in Fcvtl2()
Dassembler-a64.h2096 void fcvtl2(const VRegister& vd, const VRegister& vn);
Dsimulator-a64.cc2543 fcvtl2(vf_fcvtl, rd, rn); in VisitNEON2RegMisc()
Dlogic-a64.cc4443 LogicVRegister Simulator::fcvtl2(VectorFormat vform, in fcvtl2() function in vixl::Simulator
Dassembler-a64.cc2778 void Assembler::fcvtl2(const VRegister& vd, in fcvtl2() function in vixl::Assembler
/external/vixl/doc/
Dsupported-instructions.md1885 void fcvtl2(const VRegister& vd, const VRegister& vn)
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp26685 fcvtl2 v11.4s, v29.8h 9d84604815b3e2cdf7f948ef138edbd8 355621ccc3c395d344caf3c099dc4e21 3eaac00…
26687 fcvtl2 v11.2d, v29.4s e87a575ebf1c5a5238771c72190ab989 6cd9501cfdd122c46c76e8d0897f8b71 459b2a0…