Searched refs:flds (Results 1 – 25 of 29) sorted by relevance
12
| /external/clang/test/SemaCXX/ |
| D | conditional-expr.cpp | 78 Fields flds; in test() local
95 int &throwRef1 = (i1 ? flds.i1 : throw 0); in test()
96 int &throwRef2 = (i1 ? throw 0 : flds.i1); in test()
97 …int &throwRef3 = (i1 ? flds.b1 : throw 0); // expected-error {{non-const reference cannot bind to … in test()
98 …int &throwRef4 = (i1 ? throw 0 : flds.b1); // expected-error {{non-const reference cannot bind to … in test()
163 int &ir1 = i1 ? flds.i1 : flds.i2; in test()
164 (i1 ? flds.b1 : flds.i2) = 0; in test()
165 (i1 ? flds.i1 : flds.b2) = 0; in test()
166 (i1 ? flds.b1 : flds.b2) = 0; in test()
198 (void)&(i1 ? flds.b1 : flds.i1); // expected-error {{address of bit-field requested}} in test()
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | inlineasm3.ll | 42 tail call void asm sideeffect "flds s15, $0 \0A", "^Uv|m,~{s15}"(float 1.000000e+00) nounwind
51 call void asm sideeffect "flds s15, $0 \0A", "*^Uv,~{s15}"(float* @k.2126) nounwind
59 call void asm sideeffect "flds s15, $0 \0A", "*^Uvm,~{s15}"(float* @k.2126) nounwind
68 ; CHECK: flds s15, s0
69 %0 = tail call float asm "flds s15, $0", "=x"() nounwind
78 ; CHECK: flds s15, d0
79 %0 = tail call double asm "flds s15, $0", "=x"() nounwind
88 ; CHECK: flds s15, s0
89 %0 = tail call float asm "flds s15, $0", "=t"() nounwind
|
| /external/llvm/test/CodeGen/X86/ |
| D | cmovcmov.ll | 18 ; NOCMOV-NEXT: flds 8(%esp)
19 ; NOCMOV-NEXT: flds 4(%esp)
45 ; NOCMOV-NEXT: flds 8(%esp)
46 ; NOCMOV-NEXT: flds 4(%esp)
74 ; NOCMOV-NEXT: flds 8(%esp)
75 ; NOCMOV-NEXT: flds 4(%esp)
105 ; NOCMOV-NEXT: flds 8(%esp)
106 ; NOCMOV-NEXT: flds 4(%esp)
136 ; NOCMOV-NEXT: flds 20(%esp)
137 ; NOCMOV-NEXT: flds 16(%esp)
|
| D | shrink-fp-const2.ll | 1 ; RUN: llc < %s -march=x86 | grep flds
2 ; This should be a flds, not fldt.
|
| D | uint_to_fp-2.ll | 15 ; CHECK-NEXT: flds (%esp)
36 ; CHECK-NEXT: flds (%esp)
|
| D | fp-trunc.ll | 11 ; CHECK-NEXT: flds (%esp)
21 ; AVX-NEXT: flds (%esp)
|
| D | fast-isel-x86.ll | 3 ; This should use flds to set the return value.
5 ; CHECK: flds
|
| D | storetrunc-fp.ll | 1 ; RUN: llc < %s -march=x86 | not grep flds
|
| D | fp-load-trunc.ll | 12 ; CHECK-NEXT: flds (%esp)
23 ; AVX-NEXT: flds (%esp)
|
| D | inline-asm-fpstack.ll | 280 ; CHECK: flds
296 ; CHECK: flds
313 ; CHECK: flds
335 ; CHECK: flds LCPI
|
| D | vec_extract-sse4.ll | 26 ; CHECK-NEXT: flds (%esp)
|
| D | vec_extract.ll | 31 ; CHECK-NEXT: flds (%esp)
|
| D | win_ftol2.ll | 31 ; FTOL: flds
|
| D | pr1505b.ll | 35 ; CHECK: flds
|
| D | sse41.ll | 142 ; X32-NEXT: flds (%esp)
161 ; X32-NEXT: flds (%esp)
|
| /external/llvm/test/MC/X86/ |
| D | x86_64-encoding.s | 229 flds (%edi)
237 flds (%rdi)
|
| D | x86-32-coverage.s | 5 flds (%edi)
|
| /external/compiler-rt/lib/builtins/i386/ |
| D | floatdisf.S | 28 flds 4(%esp)
|
| D | floatundisf.S | 101 flds 4(%esp)
|
| /external/valgrind/none/tests/x86/ |
| D | insn_fpu.def | 253 flds m32.ps[1234.5678] => st0.ps[1234.5678]
254 flds m32.ps[-1234.5678] => st0.ps[-1234.5678]
|
| /external/valgrind/none/tests/amd64/ |
| D | insn_fpu.def | 253 flds m32.ps[1234.5678] => st0.ps[1234.5678]
254 flds m32.ps[-1234.5678] => st0.ps[-1234.5678]
|
| /external/mesa3d/src/mesa/x86/ |
| D | assyntax.h | 739 #define FLD_S(a) CHOICE(flds a, flds a, flds a)
|
| /external/llvm/lib/Target/X86/ |
| D | README-SSE.txt | 706 flds (%esp)
|
| D | README.txt | 307 0000002a flds (%esp,1)
|
| /external/valgrind/perf/ |
| D | tinycc.c | 3399 DEF_ASM_OP1(flds, 0xd9, 0, OPC_MODRM, OPT_EA)
3856 DEF_ASM_OP1(flds, 0xd9, 0, OPC_MODRM, OPT_EA)
4731 DEF_ASM_OP1(flds, 0xd9, 0, OPC_MODRM, OPT_EA)
5188 DEF_ASM_OP1(flds, 0xd9, 0, OPC_MODRM, OPT_EA)
15438 DEF_ASM_OP1(flds, 0xd9, 0, OPC_MODRM, OPT_EA)
15900 DEF_ASM_OP1(flds, 0xd9, 0, OPC_MODRM, OPT_EA)
|
12