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Searched refs:fminnmp (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s103 fminnmp v10.2s, v15.2s, v22.2s
104 fminnmp v3.4s, v5.4s, v6.4s
105 fminnmp v17.2d, v13.2d, v2.2d
Dneon-diagnostics.s1202 fminnmp v0.4s, v1.2s, v2.4s
1203 fminnmp v0.16b, v0.16b, v0.16b
2935 fminnmp s0, v1.2d
2936 fminnmp d31, v2.4s
2937 fminnmp v1.4s, v2.2d
Darm64-advsimd.s321 fminnmp.2s v0, v0, v0
391 ; CHECK: fminnmp.2s v0, v0, v0 ; encoding: [0x00,0xc4,0xa0,0x2e]
/external/llvm/test/CodeGen/AArch64/
Darm64-fminv.ll55 ; CHECK: fminnmp s0, v0.2s
69 ; CHECK: fminnmp d0, v0.2d
Darm64-vmax.ll621 ;CHECK: fminnmp.2s
624 %tmp3 = call <2 x float> @llvm.aarch64.neon.fminnmp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
630 ;CHECK: fminnmp.4s
633 %tmp3 = call <4 x float> @llvm.aarch64.neon.fminnmp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
639 ;CHECK: fminnmp.2d
642 %tmp3 = call <2 x double> @llvm.aarch64.neon.fminnmp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
646 declare <2 x float> @llvm.aarch64.neon.fminnmp.v2f32(<2 x float>, <2 x float>) nounwind readnone
647 declare <4 x float> @llvm.aarch64.neon.fminnmp.v4f32(<4 x float>, <4 x float>) nounwind readnone
648 declare <2 x double> @llvm.aarch64.neon.fminnmp.v2f64(<2 x double>, <2 x double>) nounwind readnone
Darm64-vminmaxnm.ll62 ; CHECK: fminnmp.2d d0, v0
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2107 V(fminnmp, Fminnmp) \
2243 V(fminnmp, Fminnmp) \
Dassembler-a64.h3646 void fminnmp(const VRegister& vd,
3651 void fminnmp(const VRegister& vd,
Dsimulator-a64.cc2670 case NEON_FMINNMP: fminnmp(vf, rd, rn, rm); break; in VisitNEON3Same()
3693 case NEON_FMINNMP_scalar: fminnmp(vf, rd, rn); break; in VisitNEONScalarPairwise()
Dsimulator-a64.h2337 V(fminnmp, fminnm, FPMinNM)
Dassembler-a64.cc3259 V(fminnmp, NEON_FMINNMP, 0)
3319 void Assembler::fminnmp(const VRegister& vd, in fminnmp() function in vixl::Assembler
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt629 # CHECK: fminnmp v2.2s, v8.2s, v25.2s
630 # CHECK: fminnmp v9.4s, v8.4s, v5.4s
631 # CHECK: fminnmp v11.2d, v10.2d, v7.2d
Darm64-advsimd.txt306 # CHECK: fminnmp.2s v0, v0, v0
/external/vixl/test/
Dtest-simulator-a64.cc3772 DEFINE_TEST_NEON_3SAME_FP(fminnmp, Basic)
3857 DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD(fminnmp, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/doc/
Dsupported-instructions.md2127 void fminnmp(const VRegister& vd,
2135 void fminnmp(const VRegister& vd,
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp26517 fminnmp d2, v23.2d a8845de3abbf4f1ec2e638aec4436238 062472a25509c38018cc7739d50f44f8 0000000000…
26518 fminnmp s2, v23.2s 26b147749e91e387eef6cbbd684eb48e f4b9e223eab02c51f15646a189efd08f 0000000000…
26522 fminnmp v2.2d, v23.2d, v11.2d 848c7138c627d57dc99698ed2c5c9f09 a29877762aad90df0443d6a45e93792a …
26523 fminnmp v2.4s, v23.4s, v11.4s f439adc0971f19d511f2d47bb864e26f d66db8124a310fbfebe1a6635ea88e5d …
26524 fminnmp v2.2s, v23.2s, v11.2s 12ea87d6eb3d4ec74b8b2be9bd3ac2b0 4d75be39242844579a2af83f4c1947ca …
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2726 defm FMINNMP : SIMDThreeSameVectorFP<1,1,0b11000,"fminnmp", int_aarch64_neon_fminnmp>;
3480 defm FMINNMP : SIMDPairwiseScalarSD<1, 1, 0b01100, "fminnmp">;