Home
last modified time | relevance | path

Searched refs:fminp (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-max-min-pairwise.s81 fminp v10.2s, v15.2s, v22.2s
82 fminp v3.4s, v5.4s, v6.4s
83 fminp v17.2d, v13.2d, v2.2d
Dneon-diagnostics.s1174 fminp v0.4s, v1.4s, v2.2d
1175 fminp v0.8h, v1.8h, v2.8h
2898 fminp s0, v1.4h
2899 fminp d31, v2.8h
2900 fminp b3, v2.2s
Darm64-advsimd.s323 fminp.2s v0, v0, v0
393 ; CHECK: fminp.2s v0, v0, v0 ; encoding: [0x00,0xf4,0xa0,0x2e]
/external/llvm/test/CodeGen/AArch64/
Darm64-fminv.ll5 ; CHECK: fminp s0, v0.2s
19 ; CHECK: fminp d0, v0.2d
Darm64-vmax.ll590 ;CHECK: fminp.2s
593 %tmp3 = call <2 x float> @llvm.aarch64.neon.fminp.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
599 ;CHECK: fminp.4s
602 %tmp3 = call <4 x float> @llvm.aarch64.neon.fminp.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
608 ;CHECK: fminp.2d
611 %tmp3 = call <2 x double> @llvm.aarch64.neon.fminp.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
615 declare <2 x float> @llvm.aarch64.neon.fminp.v2f32(<2 x float>, <2 x float>) nounwind readnone
616 declare <4 x float> @llvm.aarch64.neon.fminp.v4f32(<4 x float>, <4 x float>) nounwind readnone
617 declare <2 x double> @llvm.aarch64.neon.fminp.v2f64(<2 x double>, <2 x double>) nounwind readnone
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2108 V(fminp, Fminp) \
2245 V(fminp, Fminp) \
Dassembler-a64.h3628 void fminp(const VRegister& vd,
3633 void fminp(const VRegister& vd,
Dsimulator-a64.cc2669 case NEON_FMINP: fminp(vf, rd, rn, rm); break; in VisitNEON3Same()
3692 case NEON_FMINP_scalar: fminp(vf, rd, rn); break; in VisitNEONScalarPairwise()
Dsimulator-a64.h2336 V(fminp, fmin, FPMin) \
Dassembler-a64.cc3257 V(fminp, NEON_FMINP, 0) \
3303 void Assembler::fminp(const VRegister& vd, in fminp() function in vixl::Assembler
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt609 # CHECK: fminp v29.2s, v28.2s, v25.2s
610 # CHECK: fminp v9.4s, v8.4s, v5.4s
611 # CHECK: fminp v11.2d, v10.2d, v7.2d
Darm64-advsimd.txt308 # CHECK: fminp.2s v0, v0, v0
/external/vixl/test/
Dtest-simulator-a64.cc3776 DEFINE_TEST_NEON_3SAME_FP(fminp, Basic)
3858 DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD(fminp, Basic) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/doc/
Dsupported-instructions.md2152 void fminp(const VRegister& vd,
2160 void fminp(const VRegister& vd,
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp26529 fminp d2, v23.2d 1f22496021170a017e9617e3ac095ccf ba85005731ed0722e2504836f37117de 000000000000…
26530 fminp s2, v23.2s d39ef910eb5703a82035b05166c254a3 5ee9b6761c8256b1b1e79c7c3c7fc973 000000000000…
26534 fminp v2.2d, v23.2d, v11.2d 356d666172069a050fb8e5420ab303a1 f616ce04da4967b01cdb716288f731c8 3…
26535 fminp v2.4s, v23.4s, v11.4s f61ce6f10ba7ee2e200945d366264523 eee8f69215cf78acfd28c7cf69908822 5…
26536 fminp v2.2s, v23.2s, v11.2s 912c510b9509be2fce748bc02884303e 55482ea77664cb9c53fd6ad425a38d71 0…
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2728 defm FMINP : SIMDThreeSameVectorFP<1,1,0b11110,"fminp", int_aarch64_neon_fminp>;
3481 defm FMINP : SIMDPairwiseScalarSD<1, 1, 0b01111, "fminp">;